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📄 chiptrip.hst

📁 关于Altera公司FPGA编程的一些常用实例代码.
💻 HST
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Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.

CHANNEL d:\max2work\tutorial\chiptrip.scf
SETUP ON
SIMULATE 0.0ns TO 800.0ns
    Project simulation was successful
    Circuit stabilized at 754.8ns
    Simulation ended at 800.0ns
    Simulation coverage: 50 percent
      0 errors
      0 warnings
TABLE d:\max2work\tutorial\chiptrip.tbl
    Successfully generated Table File 'd:\max2work\tutorial\chiptrip.tbl'

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