step_a.hif

来自「步进的控制电机控制 c++环境下开发」· HIF 代码 · 共 4,393 行 · 第 1/5 页

DFF
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
clock
data0
data10
data11
data12
data13
data14
data15
data1
data2
data3
data4
data5
data6
data7
data8
data9
q0
q10
q11
q12
q13
q14
q15
q1
q2
q3
q4
q5
q6
q7
q8
q9
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|lpm_constant.inc
1081478554
d:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
}
# end
# entity
lpm_counter
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|lpm_counter.tdf
1088009428
6
# storage
db|step_a.(14).cnf
db|step_a.(14).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
16
PARAMETER_DEC
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
cntr_8f8
PARAMETER_UNKNOWN
USR
}
# used_port {
aclr
clk_en
clock
cout
q0
q10
q11
q12
q13
q14
q15
q1
q2
q3
q4
q5
q6
q7
q8
q9
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|lpm_constant.inc
1081478554
d:|altera|quartus41|libraries|megafunctions|lpm_decode.inc
1081478592
d:|altera|quartus41|libraries|megafunctions|lpm_add_sub.inc
1081478464
d:|altera|quartus41|libraries|megafunctions|cmpconst.inc
1081478088
d:|altera|quartus41|libraries|megafunctions|lpm_compare.inc
1081478538
d:|altera|quartus41|libraries|megafunctions|lpm_counter.inc
1081478574
d:|altera|quartus41|libraries|megafunctions|dffeea.inc
1081478268
d:|altera|quartus41|libraries|megafunctions|alt_synch_counter.inc
1081477038
d:|altera|quartus41|libraries|megafunctions|alt_synch_counter_f.inc
1081477054
d:|altera|quartus41|libraries|megafunctions|alt_counter_f10ke.inc
1081476700
d:|altera|quartus41|libraries|megafunctions|alt_counter_stratix.inc
1081476712
d:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
}
# end
# entity
busmux
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|BUSMUX.tdf
1088009416
6
# storage
db|step_a.(16).cnf
db|step_a.(16).cnf
# user_parameter {
WIDTH
4
PARAMETER_UNKNOWN
USR
}
# used_port {
dataa0
dataa1
dataa2
dataa3
datab0
datab1
datab2
datab3
result0
result1
result2
result3
sel
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|lpm_mux.inc
1081478758
}
# end
# entity
lpm_mux
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|lpm_mux.tdf
1088009432
6
# storage
db|step_a.(17).cnf
db|step_a.(17).cnf
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
4
PARAMETER_UNKNOWN
USR
LPM_SIZE
2
PARAMETER_UNKNOWN
USR
LPM_WIDTHS
1
PARAMETER_UNKNOWN
USR
LPM_PIPELINE
0
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
mux_6fc
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
}
# used_port {
data0_0
data0_1
data0_2
data0_3
data1_0
data1_1
data1_2
data1_3
sel0
result0
result1
result2
result3
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
d:|altera|quartus41|libraries|megafunctions|muxlut.inc
1081479144
d:|altera|quartus41|libraries|megafunctions|bypassff.inc
1081477994
d:|altera|quartus41|libraries|megafunctions|altshift.inc
1081477602
}
# end
# entity
altsyncram
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|altsyncram.tdf
1088009418
6
# storage
db|step_a.(21).cnf
db|step_a.(21).cnf
# user_parameter {
BYTE_SIZE_BLOCK
8
PARAMETER_UNKNOWN
DEF
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
OPERATION_MODE
ROM
PARAMETER_UNKNOWN
USR
WIDTH_A
16
PARAMETER_DEC
USR
WIDTHAD_A
5
PARAMETER_DEC
USR
NUMWORDS_A
32
PARAMETER_DEC
USR
OUTDATA_REG_A
UNREGISTERED
PARAMETER_UNKNOWN
USR
ADDRESS_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
OUTDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
USR
WRCONTROL_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_A
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_B
1
PARAMETER_UNKNOWN
DEF
WIDTHAD_B
1
PARAMETER_UNKNOWN
DEF
NUMWORDS_B
1
PARAMETER_UNKNOWN
DEF
INDATA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
WRCONTROL_WRADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
RDCONTROL_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
ADDRESS_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
OUTDATA_REG_B
UNREGISTERED
PARAMETER_UNKNOWN
DEF
BYTEENA_REG_B
CLOCK1
PARAMETER_UNKNOWN
DEF
INDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WRCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
ADDRESS_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
OUTDATA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
RDCONTROL_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
BYTEENA_ACLR_B
NONE
PARAMETER_UNKNOWN
DEF
WIDTH_BYTEENA_A
1
PARAMETER_DEC
USR
WIDTH_BYTEENA_B
1
PARAMETER_UNKNOWN
DEF
RAM_BLOCK_TYPE
AUTO
PARAMETER_UNKNOWN
DEF
BYTE_SIZE
8
PARAMETER_UNKNOWN
DEF
READ_DURING_WRITE_MODE_MIXED_PORTS
DONT_CARE
PARAMETER_UNKNOWN
DEF
INIT_FILE
PWM_1.mif
PARAMETER_UNKNOWN
USR
INIT_FILE_LAYOUT
PORT_A
PARAMETER_UNKNOWN
DEF
MAXIMUM_DEPTH
0
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_INPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_A
NORMAL
PARAMETER_UNKNOWN
DEF
CLOCK_ENABLE_OUTPUT_B
NORMAL
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
altsyncram_0fs
PARAMETER_UNKNOWN
USR
}
# used_port {
address_a0
address_a1
address_a2
address_a3
address_a4
clock0
q_a0
q_a10
q_a11
q_a12
q_a13
q_a14
q_a15
q_a1
q_a2
q_a3
q_a4
q_a5
q_a6
q_a7
q_a8
q_a9
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|stratix_ram_block.inc
1081479498
d:|altera|quartus41|libraries|megafunctions|lpm_mux.inc
1081478758
d:|altera|quartus41|libraries|megafunctions|lpm_decode.inc
1081478592
d:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
d:|altera|quartus41|libraries|megafunctions|altsyncram.inc
1081477654
d:|altera|quartus41|libraries|megafunctions|a_rdenreg.inc
1081476578
d:|altera|quartus41|libraries|megafunctions|altrom.inc
1081477590
d:|altera|quartus41|libraries|megafunctions|altram.inc
1081477560
d:|altera|quartus41|libraries|megafunctions|altdpram.inc
1081477328
d:|altera|quartus41|libraries|megafunctions|altqpram.inc
1081477546
}
# end
# entity
sld_mod_ram_rom
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
4
# storage
db|step_a.(22).cnf
db|step_a.(22).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
sld_node_info
1601024
PARAMETER_DEC
DEF
sld_ip_version
0
PARAMETER_DEC
DEF
sld_ip_minor_version
0
PARAMETER_DEC
DEF
sld_common_ip_version
0
PARAMETER_DEC
DEF
width_word
16
PARAMETER_UNKNOWN
USR
numwords
32
PARAMETER_UNKNOWN
USR
widthad
5
PARAMETER_UNKNOWN
USR
shift_count_bits
5
PARAMETER_UNKNOWN
USR
cvalue
0000000000000000
PARAMETER_UNKNOWN
USR
is_data_in_ram
1
PARAMETER_UNKNOWN
USR
is_readable
1
PARAMETER_UNKNOWN
USR
node_name
1919905076
PARAMETER_UNKNOWN
USR
}
# end
# entity
sld_rom_sr
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|sld_rom_sr.vhd
1088009284
4
# storage
db|step_a.(23).cnf
db|step_a.(23).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
common_ip_version
0
PARAMETER_DEC
USR
n_bits
80
PARAMETER_DEC
USR
word_size
4
PARAMETER_DEC
USR
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
}
# end
# entity
sld_hub
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|sld_hub.vhd
1088009286
4
# storage
db|step_a.(26).cnf
db|step_a.(26).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
sld_hub_ip_version
1
PARAMETER_UNKNOWN
USR
sld_hub_ip_minor_version
1
PARAMETER_UNKNOWN
USR
sld_common_ip_version
0
PARAMETER_UNKNOWN
USR
device_family
Cyclone
PARAMETER_UNKNOWN
USR
n_nodes
1
PARAMETER_UNKNOWN
USR
n_sel_bits
1
PARAMETER_UNKNOWN
USR
n_node_ir_bits
5
PARAMETER_UNKNOWN
USR
node_info
00000000000110000110111000000000
PARAMETER_BIN
USR
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
d:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
}
# end
# entity
sld_jtag_state_machine
# architecture
A:rtl
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|sld_hub.vhd
1088009286
4
# storage
db|step_a.(28).cnf
db|step_a.(28).cnf
# internal_option {
IP_SHOW_ELABORATION_MESSAGES
OFF
AUTO_RESOURCE_SHARING
OFF
PRESERVE_REGISTER
OFF
DUP_REG_EXTRACTION
ON
DUP_LOGIC_EXTRACTION
ON
VHDL_VERILOG_BREAK_LOOPS
OFF
}
# user_parameter {
ip_major_version
1
PARAMETER_DEC
USR
ip_minor_version
1
PARAMETER_DEC
USR
common_ip_version
0
PARAMETER_DEC
USR
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
d:|altera|quartus41|libraries|megafunctions|sld_mod_ram_rom.vhd
1088009288
}
# end
# entity
lpm_shiftreg
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|lpm_shiftreg.tdf
1088009432
6
# storage
db|step_a.(31).cnf
db|step_a.(31).cnf
# user_parameter {
LPM_WIDTH
10
PARAMETER_DEC
USR
LPM_DIRECTION
RIGHT
PARAMETER_UNKNOWN
USR
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
}
# used_port {
aclr
clock
enable
q0
q1
q2
q3
q4
q5
q6
q7
q8
q9
shiftin
}
# include_file {
d:|altera|quartus41|libraries|megafunctions|lpm_constant.inc
1081478554
d:|altera|quartus41|libraries|megafunctions|dffeea.inc
1081478268
d:|altera|quartus41|libraries|megafunctions|aglobal41.inc
1088009406
}
# end
# entity
lpm_decode
# case_insensitive
# source_file
d:|altera|quartus41|libraries|megafunctions|lpm_decode.tdf
1088009430
6
# storage
db|step_a.(34).cnf
db|step_a.(34).cnf
# user_parameter {
LPM_WIDTH