step_a.rpt
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RPT
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Project Information d:\step_1k30\step_a.rpt
MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 01/28/2005 11:57:40
Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera. Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner. Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors. No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.
***** Project compilation was successful
** DEVICE SUMMARY **
Chip/ Input Output Bidir Memory Memory LCs
POF Device Pins Pins Pins Bits % Utilized LCs % Utilized
step_a EP1K30TC144-1 8 25 0 512 2 % 90 5 %
User Pins: 8 25 0
Project Information d:\step_1k30\step_a.rpt
** PIN/LOCATION/CHIP ASSIGNMENTS **
Actual
User Assignments
Assignments (if different) Node Name
step_a@126 clk0
step_a@56 clk5
step_a@144 CNTT
step_a@87 DLED0
step_a@88 DLED1
step_a@9 D_STP
step_a@30 D0
step_a@31 D1
step_a@32 D2
step_a@33 D3
step_a@36 D4
step_a@37 D5
step_a@38 D6
step_a@39 D7
step_a@41 D8
step_a@65 D9
step_a@67 D10
step_a@68 D11
step_a@69 D12
step_a@70 D13
step_a@72 D14
step_a@73 D15
step_a@138 F
step_a@54 F1HZ
step_a@18 S
step_a@19 u_d
step_a@143 Y0
step_a@142 Y1
step_a@141 Y2
step_a@140 Y3
step_a@137 Z
step_a@8 Z_F
Project Information d:\step_1k30\step_a.rpt
** EMBEDDED ARRAYS **
|LPM_ROM:2|altrom:srom|content: MEMORY (
width = 16;
depth = 32;
segmentsize = 32;
mode = MEM_READONLY#MEM_INITIALIZED#MEM_REG_WADDR_CLK0#MEM_REG_WCTRL_CLK0;
file = ".\pwm_1.mif";
)
OF SEGMENTS (
|LPM_ROM:2|altrom:srom|segment0_15,
|LPM_ROM:2|altrom:srom|segment0_14,
|LPM_ROM:2|altrom:srom|segment0_13,
|LPM_ROM:2|altrom:srom|segment0_12,
|LPM_ROM:2|altrom:srom|segment0_11,
|LPM_ROM:2|altrom:srom|segment0_10,
|LPM_ROM:2|altrom:srom|segment0_9,
|LPM_ROM:2|altrom:srom|segment0_8,
|LPM_ROM:2|altrom:srom|segment0_7,
|LPM_ROM:2|altrom:srom|segment0_6,
|LPM_ROM:2|altrom:srom|segment0_5,
|LPM_ROM:2|altrom:srom|segment0_4,
|LPM_ROM:2|altrom:srom|segment0_3,
|LPM_ROM:2|altrom:srom|segment0_2,
|LPM_ROM:2|altrom:srom|segment0_1,
|LPM_ROM:2|altrom:srom|segment0_0
);
Project Information d:\step_1k30\step_a.rpt
** FILE HIERARCHY **
|lpm_rom:2|
|lpm_rom:2|altrom:srom|
|busmux:41|
|busmux:41|lpm_mux:40|
|busmux:41|lpm_mux:40|altshift:external_latency_ffs|
|busmux:41|lpm_mux:40|muxlut:57|
|busmux:41|lpm_mux:40|muxlut:72|
|busmux:41|lpm_mux:40|muxlut:87|
|busmux:41|lpm_mux:40|muxlut:102|
|21mux:66|
|21mux:65|
|cnt8:83|
|cnt8:83|lpm_add_sub:26|
|cnt8:83|lpm_add_sub:26|addcore:adder|
|cnt8:83|lpm_add_sub:26|altshift:result_ext_latency_ffs|
|cnt8:83|lpm_add_sub:26|altshift:carry_ext_latency_ffs|
|cnt8:83|lpm_add_sub:26|altshift:oflow_ext_latency_ffs|
|cmp3:96|
|cmp3:96|lpm_compare:1|
|cmp3:96|lpm_compare:1|comptree:comparator|
|cmp3:96|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|
|cmp3:96|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|
|cmp3:96|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp1|
|cmp3:96|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp0|
|cmp3:96|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|
|cmp3:96|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|cmpchain:gt_cmp_end|
|cmp3:96|lpm_compare:1|altshift:aeb_ext_lat_ffs|
|cmp3:96|lpm_compare:1|altshift:agb_ext_lat_ffs|
|cmp3:131|
|cmp3:131|lpm_compare:1|
|cmp3:131|lpm_compare:1|comptree:comparator|
|cmp3:131|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|
|cmp3:131|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|
|cmp3:131|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp1|
|cmp3:131|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp0|
|cmp3:131|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|
|cmp3:131|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|cmpchain:gt_cmp_end|
|cmp3:131|lpm_compare:1|altshift:aeb_ext_lat_ffs|
|cmp3:131|lpm_compare:1|altshift:agb_ext_lat_ffs|
|cmp3:95|
|cmp3:95|lpm_compare:1|
|cmp3:95|lpm_compare:1|comptree:comparator|
|cmp3:95|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|
|cmp3:95|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|
|cmp3:95|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp1|
|cmp3:95|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp0|
|cmp3:95|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|
|cmp3:95|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|cmpchain:gt_cmp_end|
|cmp3:95|lpm_compare:1|altshift:aeb_ext_lat_ffs|
|cmp3:95|lpm_compare:1|altshift:agb_ext_lat_ffs|
|cmp3:94|
|cmp3:94|lpm_compare:1|
|cmp3:94|lpm_compare:1|comptree:comparator|
|cmp3:94|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|
|cmp3:94|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|
|cmp3:94|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp1|
|cmp3:94|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp0|
|cmp3:94|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|
|cmp3:94|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|cmpchain:gt_cmp_end|
|cmp3:94|lpm_compare:1|altshift:aeb_ext_lat_ffs|
|cmp3:94|lpm_compare:1|altshift:agb_ext_lat_ffs|
|cmp3:93|
|cmp3:93|lpm_compare:1|
|cmp3:93|lpm_compare:1|comptree:comparator|
|cmp3:93|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|
|cmp3:93|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|
|cmp3:93|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp1|
|cmp3:93|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|cmpchain:cmp0|
|cmp3:93|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|
|cmp3:93|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|comptree:comp|comptree:sub_comptree|cmpchain:gt_cmp_end|
|cmp3:93|lpm_compare:1|altshift:aeb_ext_lat_ffs|
|cmp3:93|lpm_compare:1|altshift:agb_ext_lat_ffs|
|freqtest:121|
|freqtest:121|testctl:U1|
|freqtest:121|reg:U2|
|freqtest:121|reg:U2|lpm_ff:lpm_ff_component|
|freqtest:121|cnt:U3|
|freqtest:121|cnt:U3|lpm_counter:lpm_counter_component|
|freqtest:121|cnt:U3|lpm_counter:lpm_counter_component|lpm_add_sub:add_sub|
|freqtest:121|cnt:U3|lpm_counter:lpm_counter_component|lpm_add_sub:add_sub|addcore:adder|
|freqtest:121|cnt:U3|lpm_counter:lpm_counter_component|lpm_add_sub:add_sub|altshift:result_ext_latency_ffs|
|freqtest:121|cnt:U3|lpm_counter:lpm_counter_component|lpm_add_sub:add_sub|altshift:carry_ext_latency_ffs|
|freqtest:121|cnt:U3|lpm_counter:lpm_counter_component|lpm_add_sub:add_sub|altshift:oflow_ext_latency_ffs|
|freqtest:121|cnt:U3|lpm_counter:lpm_counter_component|lpm_constant:scdw|
|dec2:125|
|cnt24:127|
|cnt24:127|lpm_add_sub:70|
|cnt24:127|lpm_add_sub:70|addcore:adder|
|cnt24:127|lpm_add_sub:70|altshift:result_ext_latency_ffs|
|cnt24:127|lpm_add_sub:70|altshift:carry_ext_latency_ffs|
|cnt24:127|lpm_add_sub:70|altshift:oflow_ext_latency_ffs|
|cnt24:127|lpm_add_sub:96|
|cnt24:127|lpm_add_sub:96|addcore:adder|
|cnt24:127|lpm_add_sub:96|altshift:result_ext_latency_ffs|
|cnt24:127|lpm_add_sub:96|altshift:carry_ext_latency_ffs|
|cnt24:127|lpm_add_sub:96|altshift:oflow_ext_latency_ffs|
|cnt5:132|
|cnt5:132|lpm_add_sub:26|
|cnt5:132|lpm_add_sub:26|addcore:adder|
|cnt5:132|lpm_add_sub:26|altshift:result_ext_latency_ffs|
|cnt5:132|lpm_add_sub:26|altshift:carry_ext_latency_ffs|
|cnt5:132|lpm_add_sub:26|altshift:oflow_ext_latency_ffs|
|decd:136|
|decd:136|lpm_add_sub:139|
|decd:136|lpm_add_sub:139|addcore:adder|
|decd:136|lpm_add_sub:139|altshift:result_ext_latency_ffs|
|decd:136|lpm_add_sub:139|altshift:carry_ext_latency_ffs|
|decd:136|lpm_add_sub:139|altshift:oflow_ext_latency_ffs|
Device-Specific Information: d:\step_1k30\step_a.rpt
step_a
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