segment_scan_clock_24cf.ucf

来自「設計VHDL24小時的時鐘」· UCF 代码 · 共 25 行

#***********************************************
#*  SEVEN_SCAN_CLOCK_24.VHD'S Constraint File  *
#*     Filename : SEVEN_SCAN_CLOCK_24CF.ucf    *
#***********************************************

TIMESPEC "TS_CLK"    = PERIOD "CLK" 25 ns HIGH 50 %;
NET "CLK" TNM_NET    = "CLK";
NET "CLK"        LOC = "P80";
NET "RESET"      LOC = "P180";
NET "ENABLE<1>"  LOC = "P43";
NET "ENABLE<2>"  LOC = "P42";
NET "ENABLE<3>"  LOC = "P41";
NET "ENABLE<4>"  LOC = "P37";
NET "ENABLE<5>"  LOC = "P36";
NET "ENABLE<6>"  LOC = "P35";
NET "SEGMENT<0>" LOC = "P34";
NET "SEGMENT<1>" LOC = "P23";
NET "SEGMENT<2>" LOC = "P24";
NET "SEGMENT<3>" LOC = "P27";
NET "SEGMENT<4>" LOC = "P29";
NET "SEGMENT<5>" LOC = "P30";
NET "SEGMENT<6>" LOC = "P31";
NET "SEGMENT<7>" LOC = "P33";