i2c_read.rpt

这是我做的I2C的vhdl程序和仿真和下载文件

Project Information                                   d:\vhdl\i2c\i2c_read.rpt

MAX+plus II Compiler Report File
Version 9.5 2/8/2000
Compiled: 05/10/2003 12:13:12

Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful


I2C_READ


** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir         Shareable
POF       Device          Pins    Pins     Pins     LCs  Expanders  % Utilized

i2c_read  EPM7064SLC44-5   7        9        0      37      25          57 %

User Pins:                 7        9        0  



Project Information                                   d:\vhdl\i2c\i2c_read.rpt

** PROJECT COMPILATION MESSAGES **

Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt3" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt3" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt3" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt3" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt3" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt3" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt3" in a Process Statement -- only the last assignment will take effect
Warning: Line 34: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt3" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt2" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt2" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt2" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt2" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt2" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt2" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt2" in a Process Statement -- only the last assignment will take effect
Warning: Line 34: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt2" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt1" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt1" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt1" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt1" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt1" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt1" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt1" in a Process Statement -- only the last assignment will take effect
Warning: Line 34: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt1" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt0" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt0" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt0" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt0" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt0" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt0" in a Process Statement -- only the last assignment will take effect
Warning: Line 38: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt0" in a Process Statement -- only the last assignment will take effect
Warning: Line 34: File d:\vhdl\i2c\s2p2.vhd: Found multiple assignments to the same signal or signal bit "cnt0" in a Process Statement -- only the last assignment will take effect
Design Doctor Warning: Unknown combinatorial feedback structure detected at primitive ':1523'
Info: Design Doctor issued 1 warning message(s) with EPLD Rules


Project Information                                   d:\vhdl\i2c\i2c_read.rpt

** AUTO GLOBAL SIGNALS **



INFO: Signal 'clk' chosen for auto global Clock


Project Information                                   d:\vhdl\i2c\i2c_read.rpt

** STATE MACHINE ASSIGNMENTS **


state: MACHINE
        OF BITS (
           state~5,
           state~4,
           state~3,
           state~2,
           state~1
        )
        WITH STATES (
                            idle = B"00000", 
                         start_a = B"01011", 
                         start_b = B"01000", 
                         start_c = B"01001", 
                         start_d = B"01010", 
                          stop_a = B"00010", 
                          stop_b = B"00011", 
                          stop_c = B"00001", 
                            rd_a = B"10010", 
                            rd_b = B"10001", 
                            rd_c = B"10000", 
                            rd_d = B"10011", 
                            wr_a = B"01110", 
                            wr_b = B"01101", 
                            wr_c = B"01100", 
                            wr_d = B"01111", 
                           ack_a = B"00111", 
                           ack_b = B"00110", 
                           ack_c = B"00101", 
                           ack_d = B"00100", 
                          nack_a = B"11011", 
                          nack_b = B"11000", 
                          nack_c = B"11001", 
                          nack_d = B"11010"
);



Project Information                                   d:\vhdl\i2c\i2c_read.rpt

** FILE HIERARCHY **



|lpm_add_sub:398|
|lpm_add_sub:398|addcore:adder|
|lpm_add_sub:398|addcore:adder|addcore:adder0|
|lpm_add_sub:398|altshift:result_ext_latency_ffs|
|lpm_add_sub:398|altshift:carry_ext_latency_ffs|
|lpm_add_sub:398|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:465|
|lpm_add_sub:465|addcore:adder|
|lpm_add_sub:465|addcore:adder|addcore:adder0|
|lpm_add_sub:465|altshift:result_ext_latency_ffs|
|lpm_add_sub:465|altshift:carry_ext_latency_ffs|
|lpm_add_sub:465|altshift:oflow_ext_latency_ffs|
|s2p2:shift|
|s2p2:shift|lpm_add_sub:491|
|s2p2:shift|lpm_add_sub:491|addcore:adder|
|s2p2:shift|lpm_add_sub:491|addcore:adder|addcore:adder0|
|s2p2:shift|lpm_add_sub:491|altshift:result_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:491|altshift:carry_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:491|altshift:oflow_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:533|
|s2p2:shift|lpm_add_sub:533|addcore:adder|
|s2p2:shift|lpm_add_sub:533|addcore:adder|addcore:adder0|
|s2p2:shift|lpm_add_sub:533|altshift:result_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:533|altshift:carry_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:533|altshift:oflow_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:575|
|s2p2:shift|lpm_add_sub:575|addcore:adder|
|s2p2:shift|lpm_add_sub:575|addcore:adder|addcore:adder0|
|s2p2:shift|lpm_add_sub:575|altshift:result_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:575|altshift:carry_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:575|altshift:oflow_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:617|
|s2p2:shift|lpm_add_sub:617|addcore:adder|
|s2p2:shift|lpm_add_sub:617|addcore:adder|addcore:adder0|
|s2p2:shift|lpm_add_sub:617|altshift:result_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:617|altshift:carry_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:617|altshift:oflow_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:659|
|s2p2:shift|lpm_add_sub:659|addcore:adder|
|s2p2:shift|lpm_add_sub:659|addcore:adder|addcore:adder0|
|s2p2:shift|lpm_add_sub:659|altshift:result_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:659|altshift:carry_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:659|altshift:oflow_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:701|
|s2p2:shift|lpm_add_sub:701|addcore:adder|
|s2p2:shift|lpm_add_sub:701|addcore:adder|addcore:adder0|
|s2p2:shift|lpm_add_sub:701|altshift:result_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:701|altshift:carry_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:701|altshift:oflow_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:743|
|s2p2:shift|lpm_add_sub:743|addcore:adder|
|s2p2:shift|lpm_add_sub:743|addcore:adder|addcore:adder0|
|s2p2:shift|lpm_add_sub:743|altshift:result_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:743|altshift:carry_ext_latency_ffs|
|s2p2:shift|lpm_add_sub:743|altshift:oflow_ext_latency_ffs|


Device-Specific Information:                          d:\vhdl\i2c\i2c_read.rpt
i2c_read

***** Logic for device 'i2c_read' compiled without errors.




Device: EPM7064SLC44-5

Device Options:
    Turbo Bit                                    = ON
    Security Bit                                 = OFF
    Enable JTAG Support                        = ON
    User Code                                  = ffff

                                               
                                               
                                               
                 w                             
                 r                             
              s  i  s  V  G  G  G  c  G        
              d  t  c  C  N  N  N  l  N  d  d  
              a  e  l  C  D  D  D  k  D  1  0  
            -----------------------------------_ 
          /   6  5  4  3  2  1 44 43 42 41 40   | 
    #TDI |  7                                39 | d3 
   start |  8                                38 | #TDO 
    stop |  9                                37 | d6 
     GND | 10                                36 | d5 
    read | 11                                35 | VCC 
  nreset | 12         EPM7064SLC44-5         34 | d7 
    #TMS | 13                                33 | d4 
RESERVED | 14                                32 | #TCK 
     VCC | 15                                31 | RESERVED 
RESERVED | 16                                30 | GND 
RESERVED | 17                                29 | RESERVED 
         |_  18 19 20 21 22 23 24 25 26 27 28  _| 
           ------------------------------------ 
              R  R  R  R  G  V  d  R  R  R  R  
              E  E  E  E  N  C  2  E  E  E  E  
              S  S  S  S  D  C     S  S  S  S  
              E  E  E  E           E  E  E  E  
              R  R  R  R           R  R  R  R  
              V  V  V  V           V  V  V  V  
              E  E  E  E           E  E  E  E  
              D  D  D  D           D  D  D  D  


N.C. = No Connect. This pin has no internal connection to the device.
VCC = Dedicated power pin, which MUST be connected to VCC.
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.

^ = Dedicated configuration pin.
+ = Reserved configuration pin, which is tri-stated during user mode.