decl7s.vhd

测频器

--Author    	: 屈峥 2002081212
--File Name 	: cnt10.vhd
--Objective 	: LED7段显示
--
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
ENTITY DECL7S IS
   PORT ( A : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
          LED7S : OUT STD_LOGIC_VECTOR(6 DOWNTO 0) );
END DECL7S;
ARCHITECTURE ONE OF DECL7S IS
   BEGIN  
      PROCESS (A)
      BEGIN
      CASE A IS
         WHEN "0000" => LED7S <= "0111111";--3F
         WHEN "0001" => LED7S <= "0000110";--06
         WHEN "0010" => LED7S <= "1011011";--5B
         WHEN "0011" => LED7S <= "1001111";--4F
         WHEN "0100" => LED7S <= "1100110";--66
         WHEN "0101" => LED7S <= "1101101";--6D
         WHEN "0110" => LED7S <= "1111101";--7D
         WHEN "0111" => LED7S <= "0000111";--07
         WHEN "1000" => LED7S <= "1111111";--7F
         WHEN "1001" => LED7S <= "1101111";--6F
         WHEN OTHERS => NULL;
      END CASE;
   END PROCESS;
END ONE;