📄 ryxiangwei_v.sdo
字号:
// Copyright (C) 1991-2004 Altera Corporation
// Any megafunction design, and related netlist (encrypted or decrypted),
// support information, device programming or simulation file, and any other
// associated documentation or information provided by Altera or a partner
// under Altera's Megafunction Partnership Program may be used only
// to program PLD devices (but not masked PLD devices) from Altera. Any
// other use of such megafunction design, netlist, support information,
// device programming or simulation file, or any other related documentation
// or information is prohibited for any other purpose, including, but not
// limited to modification, reverse engineering, de-compiling, or use with
// any other silicon devices, unless such use is explicitly licensed under
// a separate agreement with Altera or a megafunction partner. Title to the
// intellectual property, including patents, copyrights, trademarks, trade
// secrets, or maskworks, embodied in any such megafunction design, netlist,
// support information, device programming or simulation file, or any other
// related documentation or information provided by Altera or a megafunction
// partner, remains with Altera, the megafunction partner, or their respective
// licensors. No other licenses, including any licenses needed under any third
// party's intellectual property, are provided herein.
//
// Device: Altera EPM7128SLC84-15 Package PLCC84
//
//
// This SDF file should be used for ModelSim (Verilog HDL output from Quartus II) only
//
(DELAYFILE
(SDFVERSION "2.1")
(DESIGN "ryxiangwei")
(DATE "11/01/2004 22:58:52")
(VENDOR "Altera")
(PROGRAM "Quartus II")
(VERSION "Version 4.0 Build 190 1/28/2004 SJ Full Version")
(DIVIDER .)
(TIMESCALE 1 ps)
(CELL
(CELLTYPE "max_asynch_io")
(INSTANCE clk\~I.asynch_inst)
(DELAY
(ABSOLUTE
(IOPATH padio dataout (3000:3000:3000) (3000:3000:3000))
)
)
)
(CELL
(CELLTYPE "max_asynch_io")
(INSTANCE Rxd\~I.asynch_inst)
(DELAY
(ABSOLUTE
(IOPATH padio dataout (2000:2000:2000) (2000:2000:2000))
)
)
)
(CELL
(CELLTYPE "max_asynch_io")
(INSTANCE Txd\~I.asynch_inst)
(DELAY
(ABSOLUTE
(IOPATH padio dataout (2000:2000:2000) (2000:2000:2000))
)
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[0\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[0\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[1\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[1\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[2\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[2\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[3\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[3\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[4\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[4\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[5\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[5\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[6\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[6\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[7\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[7\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_io")
(INSTANCE Load\~I.asynch_inst)
(DELAY
(ABSOLUTE
(IOPATH padio dataout (2000:2000:2000) (2000:2000:2000))
)
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[8\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[8\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[9\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[9\]\~I.preg)
(DELAY
(ABSOLUTE
(PORT pclk[0] (8000:8000:8000) (8000:8000:8000))
(IOPATH (posedge pclk[0]) regout (1000:1000:1000) (1000:1000:1000))
)
)
(TIMINGCHECK
(SETUP datain (posedge pclk[0]) (4000:4000:4000))
(HOLD datain (posedge pclk[0]) (4000:4000:4000))
)
)
(CELL
(CELLTYPE "max_asynch_mcell")
(INSTANCE out_link_link\[10\]\~I.pcom)
(DELAY
(ABSOLUTE
(PORT pterm1[0] (2000:2000:2000) (2000:2000:2000))
(IOPATH pterm1[0] regin (6000:6000:6000) (6000:6000:6000))
(IOPATH fbkin regin (8000:8000:8000) (8000:8000:8000))
)
)
)
(CELL
(CELLTYPE "max_mcell_register")
(INSTANCE out_link_link\[10\]\~I.preg)
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -