fenpin.vhd

出租车计费系统的 实现

library  ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity FENPIN is
port ( clk:in std_logic;
            fout:out std_logic);
end;
architecture BEHV of FENPIN is
     signal qq:std_logic;
begin
one:process(clk)
  variable cnt8:std_logic_vector(7 downto 0);
 begin 
  if clk'event and clk='1' then
     if cnt8="10100000" then 
      cnt8:="00000000";
      qq<='1';
     else 
       cnt8:=cnt8+1;
       qq<='0';
end if;
end if;
end process one;
two:process(qq)
 variable cnt2:std_logic;
begin
    if qq='1' then
    cnt2:=not cnt2;
    if cnt2='1' then
       fout<='1';
    else
       fout<='0';
 end if;
 end if;
end process two;

end;