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📄 isa_lpt.map.eqn

📁 这也是8255的设计,不知道是否好使,希望得到验证
💻 EQN
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L58 is LPT_ACK_CS~153
A1L58 = ISA_A[3] & ISA_A[8] & !ISA_AEN & !ISA_A[14];


--A1L59 is LPT_ACK_CS~154
A1L59 = ISA_A[9] & !ISA_A[19] & !ISA_A[16] & !ISA_A[13];


--A1L60 is LPT_ACK_CS~155
A1L60 = ISA_A[4] & !ISA_A[18] & !ISA_A[2] & !ISA_A[10];


--A1L61 is LPT_ACK_CS~156
A1L61 = !ISA_A[17] & !ISA_A[15] & !ISA_A[7] & !ISA_A[11];


--A1L62 is LPT_ACK_CS~157
A1L62 = A1L58 & A1L59 & A1L60 & A1L61;


--A1L63 is LPT_ACK_CS~158
A1L63 = A1L62 & ISA_A[5] & ISA_A[6] & !ISA_A[12];


--LPT_STOB_CS is LPT_STOB_CS
LPT_STOB_CS = ISA_A[0] & A1L63 & !ISA_A[1] & !ISA_IOW;


--DATA_reg[0] is DATA_reg[0]
DATA_reg[0] = DFFEAS(A1L37, A1L67,  ,  ,  ,  ,  ,  ,  );


--DATA_reg[1] is DATA_reg[1]
DATA_reg[1] = DFFEAS(A1L39, A1L67,  ,  ,  ,  ,  ,  ,  );


--DATA_reg[2] is DATA_reg[2]
DATA_reg[2] = DFFEAS(A1L41, A1L67,  ,  ,  ,  ,  ,  ,  );


--DATA_reg[3] is DATA_reg[3]
DATA_reg[3] = DFFEAS(A1L43, A1L67,  ,  ,  ,  ,  ,  ,  );


--DATA_reg[4] is DATA_reg[4]
DATA_reg[4] = DFFEAS(A1L45, A1L67,  ,  ,  ,  ,  ,  ,  );


--DATA_reg[5] is DATA_reg[5]
DATA_reg[5] = DFFEAS(A1L47, A1L67,  ,  ,  ,  ,  ,  ,  );


--DATA_reg[6] is DATA_reg[6]
DATA_reg[6] = DFFEAS(A1L49, A1L67,  ,  ,  ,  ,  ,  ,  );


--DATA_reg[7] is DATA_reg[7]
DATA_reg[7] = DFFEAS(A1L51, A1L67,  ,  ,  ,  ,  ,  ,  );


--A1L67 is LPT_DATA_CS~1
A1L67 = ISA_A[0] # ISA_A[1] # ISA_IOW # !A1L63;


--LPT_BUSY_CS is LPT_BUSY_CS
LPT_BUSY_CS = A1L63 & ISA_A[1] & !ISA_A[0] & !ISA_IOR;


--LPT_ACK_CS is LPT_ACK_CS
LPT_ACK_CS = ISA_A[0] & A1L63 & ISA_A[1] & !ISA_IOR;


--ISA_RESET is ISA_RESET
--operation mode is input

ISA_RESET = INPUT();


--ISA_A[0] is ISA_A[0]
--operation mode is input

ISA_A[0] = INPUT();


--ISA_A[3] is ISA_A[3]
--operation mode is input

ISA_A[3] = INPUT();


--ISA_A[8] is ISA_A[8]
--operation mode is input

ISA_A[8] = INPUT();


--ISA_AEN is ISA_AEN
--operation mode is input

ISA_AEN = INPUT();


--ISA_A[14] is ISA_A[14]
--operation mode is input

ISA_A[14] = INPUT();


--ISA_A[9] is ISA_A[9]
--operation mode is input

ISA_A[9] = INPUT();


--ISA_A[19] is ISA_A[19]
--operation mode is input

ISA_A[19] = INPUT();


--ISA_A[16] is ISA_A[16]
--operation mode is input

ISA_A[16] = INPUT();


--ISA_A[13] is ISA_A[13]
--operation mode is input

ISA_A[13] = INPUT();


--ISA_A[4] is ISA_A[4]
--operation mode is input

ISA_A[4] = INPUT();


--ISA_A[18] is ISA_A[18]
--operation mode is input

ISA_A[18] = INPUT();


--ISA_A[2] is ISA_A[2]
--operation mode is input

ISA_A[2] = INPUT();


--ISA_A[10] is ISA_A[10]
--operation mode is input

ISA_A[10] = INPUT();


--ISA_A[17] is ISA_A[17]
--operation mode is input

ISA_A[17] = INPUT();


--ISA_A[15] is ISA_A[15]
--operation mode is input

ISA_A[15] = INPUT();


--ISA_A[7] is ISA_A[7]
--operation mode is input

ISA_A[7] = INPUT();


--ISA_A[11] is ISA_A[11]
--operation mode is input

ISA_A[11] = INPUT();


--ISA_A[5] is ISA_A[5]
--operation mode is input

ISA_A[5] = INPUT();


--ISA_A[6] is ISA_A[6]
--operation mode is input

ISA_A[6] = INPUT();


--ISA_A[12] is ISA_A[12]
--operation mode is input

ISA_A[12] = INPUT();


--ISA_A[1] is ISA_A[1]
--operation mode is input

ISA_A[1] = INPUT();


--ISA_IOW is ISA_IOW
--operation mode is input

ISA_IOW = INPUT();


--LPT_BUSY is LPT_BUSY
--operation mode is input

LPT_BUSY = INPUT();


--ISA_IOR is ISA_IOR
--operation mode is input

ISA_IOR = INPUT();


--LPT_ACK is LPT_ACK
--operation mode is input

LPT_ACK = INPUT();


--LPT_RESET is LPT_RESET
--operation mode is output

LPT_RESET = OUTPUT(GND);


--LPT_STOB is LPT_STOB
--operation mode is output

LPT_STOB = OUTPUT(!LPT_STOB_CS);


--LPT_D[0] is LPT_D[0]
--operation mode is output

LPT_D[0] = OUTPUT(DATA_reg[0]);


--LPT_D[1] is LPT_D[1]
--operation mode is output

LPT_D[1] = OUTPUT(DATA_reg[1]);


--LPT_D[2] is LPT_D[2]
--operation mode is output

LPT_D[2] = OUTPUT(DATA_reg[2]);


--LPT_D[3] is LPT_D[3]
--operation mode is output

LPT_D[3] = OUTPUT(DATA_reg[3]);


--LPT_D[4] is LPT_D[4]
--operation mode is output

LPT_D[4] = OUTPUT(DATA_reg[4]);


--LPT_D[5] is LPT_D[5]
--operation mode is output

LPT_D[5] = OUTPUT(DATA_reg[5]);


--LPT_D[6] is LPT_D[6]
--operation mode is output

LPT_D[6] = OUTPUT(DATA_reg[6]);


--LPT_D[7] is LPT_D[7]
--operation mode is output

LPT_D[7] = OUTPUT(DATA_reg[7]);


--DIR0 is DIR0
--operation mode is output

DIR0 = OUTPUT(GND);


--DIR8 is DIR8
--operation mode is output

DIR8 = OUTPUT(VCC);


--DIR16 is DIR16
--operation mode is output

DIR16 = OUTPUT(GND);


--a0 is a0
--operation mode is output

a0 = OUTPUT(GND);


--a1 is a1
--operation mode is output

a1 = OUTPUT(GND);


--a2 is a2
--operation mode is output

a2 = OUTPUT(GND);


--a3 is a3
--operation mode is output

a3 = OUTPUT(GND);


--a4 is a4
--operation mode is output

a4 = OUTPUT(GND);


--a5 is a5
--operation mode is output

a5 = OUTPUT(GND);


--A1L37 is ISA_D[0]~7
--operation mode is bidir

A1L37 = ISA_D[0];

--ISA_D[0] is ISA_D[0]
--operation mode is bidir

ISA_D[0]_tri_out = TRI(LPT_BUSY, LPT_BUSY_CS);
ISA_D[0] = BIDIR(ISA_D[0]_tri_out);


--A1L39 is ISA_D[1]~6
--operation mode is bidir

A1L39 = ISA_D[1];

--ISA_D[1] is ISA_D[1]
--operation mode is bidir

ISA_D[1]_tri_out = TRI(LPT_ACK, LPT_ACK_CS);
ISA_D[1] = BIDIR(ISA_D[1]_tri_out);


--A1L41 is ISA_D[2]~5
--operation mode is bidir

A1L41 = ISA_D[2];

--ISA_D[2] is ISA_D[2]
--operation mode is bidir

ISA_D[2] = BIDIR(OPNDRN(VCC));


--A1L43 is ISA_D[3]~4
--operation mode is bidir

A1L43 = ISA_D[3];

--ISA_D[3] is ISA_D[3]
--operation mode is bidir

ISA_D[3] = BIDIR(OPNDRN(VCC));


--A1L45 is ISA_D[4]~3
--operation mode is bidir

A1L45 = ISA_D[4];

--ISA_D[4] is ISA_D[4]
--operation mode is bidir

ISA_D[4] = BIDIR(OPNDRN(VCC));


--A1L47 is ISA_D[5]~2
--operation mode is bidir

A1L47 = ISA_D[5];

--ISA_D[5] is ISA_D[5]
--operation mode is bidir

ISA_D[5] = BIDIR(OPNDRN(VCC));


--A1L49 is ISA_D[6]~1
--operation mode is bidir

A1L49 = ISA_D[6];

--ISA_D[6] is ISA_D[6]
--operation mode is bidir

ISA_D[6] = BIDIR(OPNDRN(VCC));


--A1L51 is ISA_D[7]~0
--operation mode is bidir

A1L51 = ISA_D[7];

--ISA_D[7] is ISA_D[7]
--operation mode is bidir

ISA_D[7] = BIDIR(OPNDRN(VCC));


--ISA_READY is ISA_READY
--operation mode is bidir

ISA_READY = BIDIR(OPNDRN(VCC));


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