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📄 dmard.rpt

📁 这是用AHDL语言编写的一个PCI采集系统的逻辑源码
💻 RPT
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-- Node name is 't2_data3' from file "dmard.tdf" line 27, column 9
-- Equation name is 't2_data3', location is LC3_A23, type is buried.
t2_data3 = DFFE( trans_data_dff3, GLOBAL( bpclk),  VCC,  VCC,  VCC);

-- Node name is 't2_data4' from file "dmard.tdf" line 27, column 9
-- Equation name is 't2_data4', location is LC7_C23, type is buried.
t2_data4 = DFFE( trans_data_dff4, GLOBAL( bpclk),  VCC,  VCC,  VCC);

-- Node name is 't2_data5' from file "dmard.tdf" line 27, column 9
-- Equation name is 't2_data5', location is LC1_B13, type is buried.
t2_data5 = DFFE( trans_data_dff5, GLOBAL( bpclk),  VCC,  VCC,  VCC);

-- Node name is 't2_data6' from file "dmard.tdf" line 27, column 9
-- Equation name is 't2_data6', location is LC2_B13, type is buried.
t2_data6 = DFFE( trans_data_dff6, GLOBAL( bpclk),  VCC,  VCC,  VCC);

-- Node name is 't2_data7' from file "dmard.tdf" line 27, column 9
-- Equation name is 't2_data7', location is LC6_B13, type is buried.
t2_data7 = DFFE( trans_data_dff7, GLOBAL( bpclk),  VCC,  VCC,  VCC);

-- Node name is 'valid' from file "dmard.tdf" line 25, column 3
-- Equation name is 'valid', type is output 
valid    =  _LC5_A24;

-- Node name is ':62' from file "dmard.tdf" line 25, column 3
-- Equation name is '_LC5_A24', type is buried 
_LC5_A24 = DFFE( trans_control~5, GLOBAL( bpclk),  VCC,  VCC,  VCC);

-- Node name is ':63' from file "dmard.tdf" line 22, column 3
-- Equation name is '_LC8_A14', type is buried 
_LC8_A14 = DFFE( VCC, GLOBAL(!sync),  start_read_id_reset,  VCC,  VCC);

-- Node name is ':179' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC8_B13', type is buried 
_LC8_B13 = LCELL( _EQ041);
  _EQ041 =  rd_addr0 &  rd_addr1;

-- Node name is ':183' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC4_B20', type is buried 
_LC4_B20 = LCELL( _EQ042);
  _EQ042 =  rd_addr0 &  rd_addr1 &  rd_addr2;

-- Node name is ':187' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC5_B20', type is buried 
_LC5_B20 = LCELL( _EQ043);
  _EQ043 =  _LC4_B20 &  rd_addr3;

-- Node name is ':191' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC6_B20', type is buried 
_LC6_B20 = LCELL( _EQ044);
  _EQ044 =  _LC4_B20 &  rd_addr3 &  rd_addr4;

-- Node name is ':195' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC1_B20', type is buried 
_LC1_B20 = LCELL( _EQ045);
  _EQ045 =  _LC4_B20 &  rd_addr3 &  rd_addr4 &  rd_addr5;

-- Node name is ':199' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC5_A23', type is buried 
_LC5_A23 = LCELL( _EQ046);
  _EQ046 =  _LC1_B20 &  rd_addr6;

-- Node name is ':203' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC8_A23', type is buried 
_LC8_A23 = LCELL( _EQ047);
  _EQ047 =  _LC1_B20 &  rd_addr6 &  rd_addr7;

-- Node name is ':207' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC2_A23', type is buried 
_LC2_A23 = LCELL( _EQ048);
  _EQ048 =  _LC1_B20 &  rd_addr6 &  rd_addr7 &  rd_addr8;

-- Node name is ':211' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC2_A22', type is buried 
_LC2_A22 = LCELL( _EQ049);
  _EQ049 =  _LC2_A23 &  rd_addr9;

-- Node name is ':215' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC5_A22', type is buried 
_LC5_A22 = LCELL( _EQ050);
  _EQ050 =  _LC2_A23 &  rd_addr9 &  rd_addr10;

-- Node name is ':219' from file "dmard.tdf" line 94, column 28
-- Equation name is '_LC7_A22', type is buried 
_LC7_A22 = LCELL( _EQ051);
  _EQ051 =  _LC2_A23 &  rd_addr9 &  rd_addr10 &  rd_addr11;

-- Node name is ':243' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC8_A24', type is buried 
_LC8_A24 = LCELL( _EQ052);
  _EQ052 =  count0 &  count1;

-- Node name is ':247' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC2_A24', type is buried 
_LC2_A24 = LCELL( _EQ053);
  _EQ053 =  count2 &  _LC8_A24;

-- Node name is ':251' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC3_A18', type is buried 
_LC3_A18 = LCELL( _EQ054);
  _EQ054 =  count2 &  count3 &  _LC8_A24;

-- Node name is ':255' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC1_A18', type is buried 
_LC1_A18 = LCELL( _EQ055);
  _EQ055 =  count2 &  count3 &  count4 &  _LC8_A24;

-- Node name is ':259' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC2_A18', type is buried 
_LC2_A18 = LCELL( _EQ056);
  _EQ056 =  count5 &  _LC1_A18;

-- Node name is ':263' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC3_A16', type is buried 
_LC3_A16 = LCELL( _EQ057);
  _EQ057 =  count6 &  _LC2_A18;

-- Node name is ':267' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC4_A16', type is buried 
_LC4_A16 = LCELL( _EQ058);
  _EQ058 =  count7 &  _LC3_A16;

-- Node name is ':271' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC7_A16', type is buried 
_LC7_A16 = LCELL( _EQ059);
  _EQ059 =  count7 &  count8 &  _LC3_A16;

-- Node name is ':275' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC2_A16', type is buried 
_LC2_A16 = LCELL( _EQ060);
  _EQ060 =  count7 &  count8 &  count9 &  _LC3_A16;

-- Node name is ':279' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC4_A20', type is buried 
_LC4_A20 = LCELL( _EQ061);
  _EQ061 =  count10 &  _LC2_A16;

-- Node name is ':283' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC7_A20', type is buried 
_LC7_A20 = LCELL( _EQ062);
  _EQ062 =  count10 &  count11 &  _LC2_A16;

-- Node name is ':287' from file "dmard.tdf" line 95, column 24
-- Equation name is '_LC2_A20', type is buried 
_LC2_A20 = LCELL( _EQ063);
  _EQ063 =  count10 &  count11 &  count12 &  _LC2_A16;

-- Node name is ':391' from file "dmard.tdf" line 103, column 19
-- Equation name is '_LC5_A18', type is buried 
!_LC5_A18 = _LC5_A18~NOT;
_LC5_A18~NOT = LCELL( _EQ064);
  _EQ064 = !count3 & !count4 & !count5 & !count6;

-- Node name is '~398~1' from file "dmard.tdf" line 103, column 19
-- Equation name is '~398~1', location is LC1_A16, type is buried.
-- synthesized logic cell 
_LC1_A16 = LCELL( _EQ065);
  _EQ065 = !count8
         # !count7
         # !count9;

-- Node name is ':400' from file "dmard.tdf" line 103, column 19
-- Equation name is '_LC5_A20', type is buried 
!_LC5_A20 = _LC5_A20~NOT;
_LC5_A20~NOT = LCELL( _EQ066);
  _EQ066 = !count10 & !count11 & !_LC5_A18
         # !count10 & !count11 &  _LC1_A16;

-- Node name is ':405' from file "dmard.tdf" line 103, column 9
-- Equation name is '_LC1_A13', type is buried 
!_LC1_A13 = _LC1_A13~NOT;
_LC1_A13~NOT = LCELL( _EQ067);
  _EQ067 = !trans_control~4
         # !count13 & !_LC5_A20
         # !count12 & !count13;

-- Node name is '~562~1' from file "dmard.tdf" line 120, column 5
-- Equation name is '~562~1', location is LC2_A14, type is buried.
-- synthesized logic cell 
_LC2_A14 = LCELL( _EQ068);
  _EQ068 = !trans_control~5 & !trans_control~6 & !trans_control~7 & 
              trans_control~8;

-- Node name is '~590~1' from file "dmard.tdf" line 123, column 10
-- Equation name is '~590~1', location is LC3_A13, type is buried.
-- synthesized logic cell 
_LC3_A13 = LCELL( _EQ069);
  _EQ069 =  trans_control~4
         #  trans_control~1
         #  trans_control~3
         #  trans_control~2;

-- Node name is '~648~1' from file "dmard.tdf" line 32, column 15
-- Equation name is '~648~1', location is LC4_A14, type is buried.
-- synthesized logic cell 
_LC4_A14 = LCELL( _EQ070);
  _EQ070 =  _LC2_A14 & !_LC3_A13
         #  trans_control~6 &  wrfull;



Project Information                          e:\hanpj\pld\dma\10k208\dmard.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:01
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:02


Memory Allocated
-----------------

Peak memory allocated during compilation  = 13,832K

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