sl.v.txt

路灯控制器 采用了状态机的概念编程

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity sl is
  port( car,clk : in bit;
           hi , lo : out std_logic_vector( 1 downto 0 ) );
  end entity sl ;
architecture one of sl is 
signal l, s, incar :bit;
signal current , nexts : std_logic_vector( 1 downto 0 );
begin
process( clk, car )
variable i : std_logic_vector(3 downto 0);
begin 
if car = '0' then i := ( others =>'0');
 elsif clk'event and clk = '1' then
        if i <"1001" then i := i+1;
        else i:=(others=>'0');
        end if;
      end if;
   if i="1001" then incar <='1';
else incar <='0';
end if;
end process;
process( current,clk)
variable i : std_logic_vector(3 downto 0 );
begin
if current'event then i := (others =>'0');
else if clk'event and clk='1' then
                      if current="00"
                        then if i<"1100" then 
                               i:=i+1;
                            else i:=(others => '0');
                            end if;
                        if i="1100" then l <='1';
                            else l <='0';
                   end if;
         else if i<"0100"
                  then i:= i+1;
            else i :=( others =>'0');
            end if;
           if i="0100"
               then s <='1';
                else  s<='0';
            end if;
          end if;
        end if;
      end if;
    end process;
process( current,incar,l,s)
begin
case current is
when "00" => hi<="10";lo<="00";
              if l='1'and incar ='1'  then
              nexts <="01";
              hi<="01";lo<="00";
              current <= nexts;
              end if;
when "01" => hi<="01";lo<="00";
              if s='1'
              then nexts<="10";
             hi<="00";lo<="10";
              current<=nexts;
              end if;
when "10" => hi <="00";lo <="10";
             if incar='1' or s='1'
                then nexts <="11";
                hi <="00"; lo<="01";
               current <= nexts;
              end if;
when "11" => hi <="00"; lo <="01";
             if s='1'
            then nexts <="00";
          hi <="10"; lo <="00";
          current <= nexts ;
           end if;
        end caes;
        end process;
  end architecture one ;