comp.tan.qmsg

一个比较器的实现方法

{ "Info" "ITDB_TH_RESULT" "reg_r1\[4\] in_sad\[4\] clk 0.900 ns register " "Info: th for register \"reg_r1\[4\]\" (data pin = \"in_sad\[4\]\", clock pin = \"clk\") is 0.900 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 3.900 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to destination register is 3.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 1.900 ns clk 1 CLK PIN_43 23 " "Info: 1: + IC(0.000 ns) + CELL(1.900 ns) = 1.900 ns; Loc. = PIN_43; Fanout = 23; CLK Node = 'clk'" {  } { { "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" "" { Report "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" Compiler "comp" "UNKNOWN" "V1" "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp.quartus_db" { Floorplan "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/" "" "" { clk } "NODE_NAME" } "" } } { "comp.vhd" "" { Text "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/comp.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(0.000 ns) 3.900 ns reg_r1\[4\] 2 REG LC5_B8 3 " "Info: 2: + IC(2.000 ns) + CELL(0.000 ns) = 3.900 ns; Loc. = LC5_B8; Fanout = 3; REG Node = 'reg_r1\[4\]'" {  } { { "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" "" { Report "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" Compiler "comp" "UNKNOWN" "V1" "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp.quartus_db" { Floorplan "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/" "" "2.000 ns" { clk reg_r1[4] } "NODE_NAME" } "" } } { "comp.vhd" "" { Text "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/comp.vhd" 17 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.900 ns 48.72 % " "Info: Total cell delay = 1.900 ns ( 48.72 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 51.28 % " "Info: Total interconnect delay = 2.000 ns ( 51.28 % )" {  } {  } 0}  } { { "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" "" { Report "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" Compiler "comp" "UNKNOWN" "V1" "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp.quartus_db" { Floorplan "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/" "" "3.900 ns" { clk reg_r1[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.900 ns" { clk clk~out reg_r1[4] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "1.400 ns + " "Info: + Micro hold delay of destination is 1.400 ns" {  } { { "comp.vhd" "" { Text "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/comp.vhd" 17 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.400 ns - Shortest pin register " "Info: - Shortest pin to register delay is 4.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 1.900 ns in_sad\[4\] 1 PIN PIN_42 3 " "Info: 1: + IC(0.000 ns) + CELL(1.900 ns) = 1.900 ns; Loc. = PIN_42; Fanout = 3; PIN Node = 'in_sad\[4\]'" {  } { { "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" "" { Report "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" Compiler "comp" "UNKNOWN" "V1" "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp.quartus_db" { Floorplan "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/" "" "" { in_sad[4] } "NODE_NAME" } "" } } { "comp.vhd" "" { Text "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/comp.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.600 ns) + CELL(0.900 ns) 4.400 ns reg_r1\[4\] 2 REG LC5_B8 3 " "Info: 2: + IC(1.600 ns) + CELL(0.900 ns) = 4.400 ns; Loc. = LC5_B8; Fanout = 3; REG Node = 'reg_r1\[4\]'" {  } { { "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" "" { Report "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" Compiler "comp" "UNKNOWN" "V1" "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp.quartus_db" { Floorplan "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/" "" "2.500 ns" { in_sad[4] reg_r1[4] } "NODE_NAME" } "" } } { "comp.vhd" "" { Text "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/comp.vhd" 17 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.800 ns 63.64 % " "Info: Total cell delay = 2.800 ns ( 63.64 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.600 ns 36.36 % " "Info: Total interconnect delay = 1.600 ns ( 36.36 % )" {  } {  } 0}  } { { "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" "" { Report "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" Compiler "comp" "UNKNOWN" "V1" "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp.quartus_db" { Floorplan "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/" "" "4.400 ns" { in_sad[4] reg_r1[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "4.400 ns" { in_sad[4] in_sad[4]~out reg_r1[4] } { 0.000ns 0.000ns 1.600ns } { 0.000ns 1.900ns 0.900ns } } }  } 0}  } { { "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" "" { Report "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" Compiler "comp" "UNKNOWN" "V1" "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp.quartus_db" { Floorplan "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/" "" "3.900 ns" { clk reg_r1[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "3.900 ns" { clk clk~out reg_r1[4] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } } { "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" "" { Report "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp_cmp.qrpt" Compiler "comp" "UNKNOWN" "V1" "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/db/comp.quartus_db" { Floorplan "D:/altera/quartus50/work/motion_estimation/stystolic_array/new_systolic_array/fsbm/comp/" "" "4.400 ns" { in_sad[4] reg_r1[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "4.400 ns" { in_sad[4] in_sad[4]~out reg_r1[4] } { 0.000ns 0.000ns 1.600ns } { 0.000ns 1.900ns 0.900ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Nov 04 15:25:43 2005 " "Info: Processing ended: Fri Nov 04 15:25:43 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0}  } {  } 0}