st_mult1.hif

veilog实现的状态机乘法器.可以参考

HIF003
--
-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	carry_sum.tdf
	{
		carry_sum [USE_LPM_FOR_AHDL_OPERATORS] []
		{
			4 [USE_LPM_FOR_AHDL_OPERATORS=OFF] [cout,sout,cin,sin];
		}
	}
	lpm_latch.tdf
	{
		lpm_latch [LPM_AVALUE=0,LPM_WIDTH,USE_LPM_FOR_AHDL_OPERATORS] [lpm_constant.inc]
		{
			3 [LPM_AVALUE=0,LPM_WIDTH=1,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Q0,GATE,DATA0];
			2 [LPM_AVALUE=0,LPM_WIDTH=1,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Q0,ACLR,ASET,GATE,DATA0];
			1 [LPM_AVALUE=0,LPM_WIDTH=1,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Q0,ACLR,GATE,DATA0];
		}
	}
	st_mult1.edf
	{
		st_mult1 [] [synplcty.lmf]
		{
			0 [] [];
		}
	}
}
TREE
{
	st_mult1::(0,0):(0): st_mult1.edf
	{
		lpm_latch:1:(166,0):(68,bei_cheng_shu_Temp_0_): lpm_latch.tdf;
		lpm_latch:1:(170,0):(69,count_2_): lpm_latch.tdf;
		lpm_latch:1:(173,0):(70,count_1_): lpm_latch.tdf;
		lpm_latch:1:(176,0):(71,count_0_): lpm_latch.tdf;
		lpm_latch:2:(179,0):(72,state_temp_1_): lpm_latch.tdf;
		lpm_latch:1:(183,0):(73,state_temp_0_): lpm_latch.tdf;
		lpm_latch:1:(187,0):(74,count_17_): lpm_latch.tdf;
		lpm_latch:1:(190,0):(75,count_16_): lpm_latch.tdf;
		lpm_latch:1:(193,0):(76,count_15_): lpm_latch.tdf;
		lpm_latch:1:(196,0):(77,count_14_): lpm_latch.tdf;
		lpm_latch:1:(199,0):(78,count_13_): lpm_latch.tdf;
		lpm_latch:1:(202,0):(79,count_12_): lpm_latch.tdf;
		lpm_latch:1:(205,0):(80,count_11_): lpm_latch.tdf;
		lpm_latch:1:(208,0):(81,count_10_): lpm_latch.tdf;
		lpm_latch:1:(211,0):(82,count_9_): lpm_latch.tdf;
		lpm_latch:1:(214,0):(83,count_8_): lpm_latch.tdf;
		lpm_latch:1:(217,0):(84,count_7_): lpm_latch.tdf;
		lpm_latch:1:(220,0):(85,count_6_): lpm_latch.tdf;
		lpm_latch:1:(223,0):(86,count_5_): lpm_latch.tdf;
		lpm_latch:1:(226,0):(87,count_4_): lpm_latch.tdf;
		lpm_latch:1:(229,0):(88,count_3_): lpm_latch.tdf;
		lpm_latch:3:(232,0):(89,bei_cheng_shu_Temp_1_): lpm_latch.tdf;
		lpm_latch:1:(235,0):(90,count_31_): lpm_latch.tdf;
		lpm_latch:1:(238,0):(91,count_30_): lpm_latch.tdf;
		lpm_latch:1:(241,0):(92,count_29_): lpm_latch.tdf;
		lpm_latch:1:(244,0):(93,count_28_): lpm_latch.tdf;
		lpm_latch:1:(247,0):(94,count_27_): lpm_latch.tdf;
		lpm_latch:1:(250,0):(95,count_26_): lpm_latch.tdf;
		lpm_latch:1:(253,0):(96,count_25_): lpm_latch.tdf;
		lpm_latch:1:(256,0):(97,count_24_): lpm_latch.tdf;
		lpm_latch:1:(259,0):(98,count_23_): lpm_latch.tdf;
		lpm_latch:1:(262,0):(99,count_22_): lpm_latch.tdf;
		lpm_latch:1:(265,0):(100,count_21_): lpm_latch.tdf;
		lpm_latch:1:(268,0):(101,count_20_): lpm_latch.tdf;
		lpm_latch:1:(271,0):(102,count_19_): lpm_latch.tdf;
		lpm_latch:1:(274,0):(103,count_18_): lpm_latch.tdf;
		lpm_latch:1:(277,0):(104,bei_cheng_shu_Temp_16_): lpm_latch.tdf;
		lpm_latch:3:(280,0):(105,bei_cheng_shu_Temp_15_): lpm_latch.tdf;
		lpm_latch:3:(283,0):(106,bei_cheng_shu_Temp_14_): lpm_latch.tdf;
		lpm_latch:3:(286,0):(107,bei_cheng_shu_Temp_13_): lpm_latch.tdf;
		lpm_latch:3:(289,0):(108,bei_cheng_shu_Temp_12_): lpm_latch.tdf;
		lpm_latch:3:(292,0):(109,bei_cheng_shu_Temp_11_): lpm_latch.tdf;
		lpm_latch:3:(295,0):(110,bei_cheng_shu_Temp_10_): lpm_latch.tdf;
		lpm_latch:3:(298,0):(111,bei_cheng_shu_Temp_9_): lpm_latch.tdf;
		lpm_latch:3:(301,0):(112,bei_cheng_shu_Temp_8_): lpm_latch.tdf;
		lpm_latch:3:(304,0):(113,bei_cheng_shu_Temp_7_): lpm_latch.tdf;
		lpm_latch:3:(307,0):(114,bei_cheng_shu_Temp_6_): lpm_latch.tdf;
		lpm_latch:3:(310,0):(115,bei_cheng_shu_Temp_5_): lpm_latch.tdf;
		lpm_latch:3:(313,0):(116,bei_cheng_shu_Temp_4_): lpm_latch.tdf;
		lpm_latch:3:(316,0):(117,bei_cheng_shu_Temp_3_): lpm_latch.tdf;
		lpm_latch:3:(319,0):(118,bei_cheng_shu_Temp_2_): lpm_latch.tdf;
		lpm_latch:1:(322,0):(119,bei_cheng_shu_Temp_31_): lpm_latch.tdf;
		lpm_latch:1:(325,0):(120,bei_cheng_shu_Temp_30_): lpm_latch.tdf;
		lpm_latch:1:(328,0):(121,bei_cheng_shu_Temp_29_): lpm_latch.tdf;
		lpm_latch:1:(331,0):(122,bei_cheng_shu_Temp_28_): lpm_latch.tdf;
		lpm_latch:1:(334,0):(123,bei_cheng_shu_Temp_27_): lpm_latch.tdf;
		lpm_latch:1:(337,0):(124,bei_cheng_shu_Temp_26_): lpm_latch.tdf;
		lpm_latch:1:(340,0):(125,bei_cheng_shu_Temp_25_): lpm_latch.tdf;
		lpm_latch:1:(343,0):(126,bei_cheng_shu_Temp_24_): lpm_latch.tdf;
		lpm_latch:1:(346,0):(127,bei_cheng_shu_Temp_23_): lpm_latch.tdf;
		lpm_latch:1:(349,0):(128,bei_cheng_shu_Temp_22_): lpm_latch.tdf;
		lpm_latch:1:(352,0):(129,bei_cheng_shu_Temp_21_): lpm_latch.tdf;
		lpm_latch:1:(355,0):(130,bei_cheng_shu_Temp_20_): lpm_latch.tdf;
		lpm_latch:1:(358,0):(131,bei_cheng_shu_Temp_19_): lpm_latch.tdf;
		lpm_latch:1:(361,0):(132,bei_cheng_shu_Temp_18_): lpm_latch.tdf;
		lpm_latch:1:(364,0):(133,bei_cheng_shu_Temp_17_): lpm_latch.tdf;
		carry_sum:4:(373,0):(134,N_36_cry): carry_sum.tdf;
		carry_sum:4:(379,0):(135,N_37_cry): carry_sum.tdf;
		carry_sum:4:(385,0):(136,N_38_cry): carry_sum.tdf;
		carry_sum:4:(391,0):(137,un9_count_cry_4_): carry_sum.tdf;
		carry_sum:4:(397,0):(138,N_40_cry): carry_sum.tdf;
		carry_sum:4:(403,0):(139,N_41_cry): carry_sum.tdf;
		carry_sum:4:(409,0):(140,N_42_cry): carry_sum.tdf;
		carry_sum:4:(415,0):(141,N_43_cry): carry_sum.tdf;
		carry_sum:4:(421,0):(142,N_44_cry): carry_sum.tdf;
		carry_sum:4:(427,0):(143,N_45_cry): carry_sum.tdf;
		carry_sum:4:(433,0):(144,N_46_cry): carry_sum.tdf;
		carry_sum:4:(439,0):(145,N_47_cry): carry_sum.tdf;
		carry_sum:4:(445,0):(146,N_48_cry): carry_sum.tdf;
		carry_sum:4:(451,0):(147,N_49_cry): carry_sum.tdf;
		carry_sum:4:(457,0):(148,N_50_cry): carry_sum.tdf;
		carry_sum:4:(463,0):(149,N_51_cry): carry_sum.tdf;
		carry_sum:4:(469,0):(150,N_52_cry): carry_sum.tdf;
		carry_sum:4:(475,0):(151,N_53_cry): carry_sum.tdf;
		carry_sum:4:(481,0):(152,N_54_cry): carry_sum.tdf;
		carry_sum:4:(487,0):(153,N_55_cry): carry_sum.tdf;
		carry_sum:4:(493,0):(154,N_56_cry): carry_sum.tdf;
		carry_sum:4:(499,0):(155,N_57_cry): carry_sum.tdf;
		carry_sum:4:(505,0):(156,N_58_cry): carry_sum.tdf;
		carry_sum:4:(511,0):(157,N_59_cry): carry_sum.tdf;
		carry_sum:4:(517,0):(158,N_60_cry): carry_sum.tdf;
		carry_sum:4:(523,0):(159,N_61_cry): carry_sum.tdf;
		carry_sum:4:(529,0):(160,N_62_cry): carry_sum.tdf;
		carry_sum:4:(535,0):(161,N_63_cry): carry_sum.tdf;
		carry_sum:4:(541,0):(162,N_64_cry): carry_sum.tdf;
	}
}