📄 st_mult1.rpt
字号:
- 4 - B 18 CARRY 0 3 0 1 |carry_sum:un4_result_add3_cry|:31
- 5 - B 18 CARRY 0 3 0 1 |carry_sum:un4_result_add4_cry|:31
- 6 - B 18 CARRY 0 3 0 1 |carry_sum:un4_result_add5_cry|:31
- 7 - B 18 CARRY 0 3 0 1 |carry_sum:un4_result_add6_cry|:31
- 8 - B 18 CARRY 0 3 0 1 |carry_sum:un4_result_add7_cry|:31
- 1 - B 20 CARRY 0 3 0 1 |carry_sum:un4_result_add8_cry|:31
- 2 - B 20 CARRY 0 3 0 1 |carry_sum:un4_result_add9_cry|:31
- 3 - B 20 CARRY 0 3 0 1 |carry_sum:un4_result_add10_cry|:31
- 4 - B 20 CARRY 0 3 0 1 |carry_sum:un4_result_add11_cry|:31
- 5 - B 20 CARRY 0 3 0 1 |carry_sum:un4_result_add12_cry|:31
- 6 - B 20 CARRY 0 3 0 1 |carry_sum:un4_result_add13_cry|:31
- 7 - B 20 CARRY 0 3 0 1 |carry_sum:un4_result_add14_cry|:31
- 8 - B 20 CARRY 0 3 0 1 |carry_sum:un4_result_add15_cry|:31
- 1 - B 22 CARRY 0 3 0 1 |carry_sum:un4_result_add16_cry|:31
- 2 - B 22 CARRY 0 3 0 1 |carry_sum:un4_result_add17_cry|:31
- 3 - B 22 CARRY 0 3 0 1 |carry_sum:un4_result_add18_cry|:31
- 4 - B 22 CARRY 0 3 0 1 |carry_sum:un4_result_add19_cry|:31
- 5 - B 22 CARRY 0 3 0 1 |carry_sum:un4_result_add20_cry|:31
- 6 - B 22 CARRY 0 3 0 1 |carry_sum:un4_result_add21_cry|:31
- 7 - B 22 CARRY 0 3 0 1 |carry_sum:un4_result_add22_cry|:31
- 8 - B 22 CARRY 0 3 0 1 |carry_sum:un4_result_add23_cry|:31
- 1 - B 24 CARRY 0 3 0 1 |carry_sum:un4_result_add24_cry|:31
- 2 - B 24 CARRY 0 3 0 1 |carry_sum:un4_result_add25_cry|:31
- 3 - B 24 CARRY 0 3 0 1 |carry_sum:un4_result_add26_cry|:31
- 4 - B 24 CARRY 0 3 0 1 |carry_sum:un4_result_add27_cry|:31
- 5 - B 24 CARRY 0 3 0 1 |carry_sum:un4_result_add28_cry|:31
- 6 - B 24 CARRY 0 3 0 1 |carry_sum:un4_result_add29_cry|:31
- 7 - B 24 CARRY 0 3 0 1 |carry_sum:un4_result_add30_cry|:31
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information:g:\taoyuhui\synplifywork_new\statemachine_mult\rev_3\maxplus\st_mult1.rpt
st_mult1
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 13/ 96( 13%) 10/ 48( 20%) 2/ 48( 4%) 12/16( 75%) 3/16( 18%) 0/16( 0%)
B: 67/ 96( 69%) 9/ 48( 18%) 42/ 48( 87%) 2/16( 12%) 12/16( 75%) 0/16( 0%)
C: 0/ 96( 0%) 0/ 48( 0%) 2/ 48( 4%) 0/16( 0%) 2/16( 12%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 2/24( 8%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
02: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
03: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 2/24( 8%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
06: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
07: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 2/24( 8%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
10: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
11: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
13: 4/24( 16%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
14: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
15: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
16: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
17: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
18: 4/24( 16%) 1/4( 25%) 2/4( 50%) 0/4( 0%)
19: 3/24( 12%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
20: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
21: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
22: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
23: 3/24( 12%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
24: 3/24( 12%) 0/4( 0%) 3/4( 75%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information:g:\taoyuhui\synplifywork_new\statemachine_mult\rev_3\maxplus\st_mult1.rpt
st_mult1
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 2 CLK
Device-Specific Information:g:\taoyuhui\synplifywork_new\statemachine_mult\rev_3\maxplus\st_mult1.rpt
st_mult1
** CARRY CHAINS **
Type Member Length Member Name: SUM, (CARRY)
ARITHMETIC 1 un4_result_add0_lx_0, (|carry_sum:un4_result_add0_cry|:31)
ARITHMETIC 2 un4_result_add1_lx_0, (|carry_sum:un4_result_add1_cry|:31)
ARITHMETIC 3 un4_result_add2_lx_0, (|carry_sum:un4_result_add2_cry|:31)
ARITHMETIC 4 un4_result_add3_lx_0, (|carry_sum:un4_result_add3_cry|:31)
ARITHMETIC 5 un4_result_add4_lx_0, (|carry_sum:un4_result_add4_cry|:31)
ARITHMETIC 6 un4_result_add5_lx_0, (|carry_sum:un4_result_add5_cry|:31)
ARITHMETIC 7 un4_result_add6_lx_0, (|carry_sum:un4_result_add6_cry|:31)
ARITHMETIC 8 un4_result_add7_lx_0, (|carry_sum:un4_result_add7_cry|:31)
ARITHMETIC 9 un4_result_add8_lx_0, (|carry_sum:un4_result_add8_cry|:31)
ARITHMETIC 10 un4_result_add9_lx_0, (|carry_sum:un4_result_add9_cry|:31)
ARITHMETIC 11 un4_result_add10_lx_0, (|carry_sum:un4_result_add10_cry|:31)
ARITHMETIC 12 un4_result_add11_lx_0, (|carry_sum:un4_result_add11_cry|:31)
ARITHMETIC 13 un4_result_add12_lx_0, (|carry_sum:un4_result_add12_cry|:31)
ARITHMETIC 14 un4_result_add13_lx_0, (|carry_sum:un4_result_add13_cry|:31)
ARITHMETIC 15 un4_result_add14_lx_0, (|carry_sum:un4_result_add14_cry|:31)
ARITHMETIC 16 un4_result_add15_lx_0, (|carry_sum:un4_result_add15_cry|:31)
ARITHMETIC 17 un4_result_add16_lx_0, (|carry_sum:un4_result_add16_cry|:31)
ARITHMETIC 18 un4_result_add17_lx_0, (|carry_sum:un4_result_add17_cry|:31)
ARITHMETIC 19 un4_result_add18_lx_0, (|carry_sum:un4_result_add18_cry|:31)
ARITHMETIC 20 un4_result_add19_lx_0, (|carry_sum:un4_result_add19_cry|:31)
ARITHMETIC 21 un4_result_add20_lx_0, (|carry_sum:un4_result_add20_cry|:31)
ARITHMETIC 22 un4_result_add21_lx_0, (|carry_sum:un4_result_add21_cry|:31)
ARITHMETIC 23 un4_result_add22_lx_0, (|carry_sum:un4_result_add22_cry|:31)
ARITHMETIC 24 un4_result_add23_lx_0, (|carry_sum:un4_result_add23_cry|:31)
ARITHMETIC 25 un4_result_add24_lx_0, (|carry_sum:un4_result_add24_cry|:31)
ARITHMETIC 26 un4_result_add25_lx_0, (|carry_sum:un4_result_add25_cry|:31)
ARITHMETIC 27 un4_result_add26_lx_0, (|carry_sum:un4_result_add26_cry|:31)
ARITHMETIC 28 un4_result_add27_lx_0, (|carry_sum:un4_result_add27_cry|:31)
ARITHMETIC 29 un4_result_add28_lx_0, (|carry_sum:un4_result_add28_cry|:31)
ARITHMETIC 30 un4_result_add29_lx_0, (|carry_sum:un4_result_add29_cry|:31)
ARITHMETIC 31 un4_result_add30_lx_0, (|carry_sum:un4_result_add30_cry|:31)
NORMAL 32 un4_result_add31
Device-Specific Information:g:\taoyuhui\synplifywork_new\statemachine_mult\rev_3\maxplus\st_mult1.rpt
st_mult1
** EQUATIONS **
bei_cheng_shu0 : INPUT;
bei_cheng_shu1 : INPUT;
bei_cheng_shu2 : INPUT;
bei_cheng_shu3 : INPUT;
bei_cheng_shu4 : INPUT;
bei_cheng_shu5 : INPUT;
bei_cheng_shu6 : INPUT;
bei_cheng_shu7 : INPUT;
bei_cheng_shu8 : INPUT;
bei_cheng_shu9 : INPUT;
bei_cheng_shu10 : INPUT;
bei_cheng_shu11 : INPUT;
bei_cheng_shu12 : INPUT;
bei_cheng_shu13 : INPUT;
bei_cheng_shu14 : INPUT;
bei_cheng_shu15 : INPUT;
cheng_shu0 : INPUT;
cheng_shu1 : INPUT;
cheng_shu2 : INPUT;
cheng_shu3 : INPUT;
cheng_shu4 : INPUT;
cheng_shu5 : INPUT;
cheng_shu6 : INPUT;
cheng_shu7 : INPUT;
cheng_shu8 : INPUT;
cheng_shu9 : INPUT;
cheng_shu10 : INPUT;
cheng_shu11 : INPUT;
cheng_shu12 : INPUT;
cheng_shu13 : INPUT;
cheng_shu14 : INPUT;
cheng_shu15 : INPUT;
CLK : INPUT;
rst : INPUT;
-- Node name is 'bei_cheng_shu_Temp_1_i_m2_1_~7' from file "st_mult1.edf" line 907
-- Equation name is 'bei_cheng_shu_Temp_1_i_m2_1_~7', location is LC1_B11, type is buried.
bei_cheng_shu_Temp_1_i_m2_1_~7 = LCELL( _EQ001);
_EQ001 = current_state_0_ & _LC8_B11
# current_state_1_ & _LC8_B11
# bei_cheng_shu1 & !current_state_0_ & !current_state_1_;
-- Node name is 'bei_cheng_shu_Temp_1_i_m2_2_~7' from file "st_mult1.edf" line 922
-- Equation name is 'bei_cheng_shu_Temp_1_i_m2_2_~7', location is LC4_B11, type is buried.
bei_cheng_shu_Temp_1_i_m2_2_~7 = LCELL( _EQ002);
_EQ002 = current_state_0_ & _LC6_B11
# current_state_1_ & _LC6_B11
# bei_cheng_shu2 & !current_state_0_ & !current_state_1_;
-- Node name is 'bei_cheng_shu_Temp_1_i_m2_3_~7' from file "st_mult1.edf" line 964
-- Equation name is 'bei_cheng_shu_Temp_1_i_m2_3_~7', location is LC7_B11, type is buried.
bei_cheng_shu_Temp_1_i_m2_3_~7 = LCELL( _EQ003);
_EQ003 = current_state_0_ & _LC5_B11
# current_state_1_ & _LC5_B11
# bei_cheng_shu3 & !current_state_0_ & !current_state_1_;
-- Node name is 'bei_cheng_shu_Temp_1_i_m2_4_~7' from file "st_mult1.edf" line 928
-- Equation name is 'bei_cheng_shu_Temp_1_i_m2_4_~7', location is LC2_B14, type is buried.
bei_cheng_shu_Temp_1_i_m2_4_~7 = LCELL( _EQ004);
_EQ004 = current_state_0_ & _LC3_B11
# current_state_1_ & _LC3_B11
# bei_cheng_shu4 & !current_state_0_ & !current_state_1_;
-- Node name is 'bei_cheng_shu_Temp_1_i_m2_5_~7' from file "st_mult1.edf" line 931
-- Equation name is 'bei_cheng_shu_Temp_1_i_m2_5_~7', location is LC3_B14, type is buried.
bei_cheng_shu_Temp_1_i_m2_5_~7 = LCELL( _EQ005);
_EQ005 = current_state_0_ & _LC6_B14
# current_state_1_ & _LC6_B14
# bei_cheng_shu5 & !current_state_0_ & !current_state_1_;
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