st_mult1.hif

veilog实现的状态机乘法器.可以参考

HIF003
--
-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
--
-- Warning: do not edit this file!
--
FILES
{
	carry_sum.tdf
	{
		carry_sum [USE_LPM_FOR_AHDL_OPERATORS] []
		{
			4 [USE_LPM_FOR_AHDL_OPERATORS=OFF] [cout,sout,cin,sin];
		}
	}
	lpm_latch.tdf
	{
		lpm_latch [LPM_AVALUE=0,LPM_WIDTH,USE_LPM_FOR_AHDL_OPERATORS] [lpm_constant.inc]
		{
			3 [LPM_AVALUE=0,LPM_WIDTH=1,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Q0,GATE,DATA0];
			2 [LPM_AVALUE=0,LPM_WIDTH=1,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Q0,ACLR,ASET,GATE,DATA0];
			1 [LPM_AVALUE=0,LPM_WIDTH=1,USE_LPM_FOR_AHDL_OPERATORS=OFF] [Q0,ACLR,GATE,DATA0];
		}
	}
	st_mult1.edf
	{
		st_mult1 [] [synplcty.lmf]
		{
			0 [] [];
		}
	}
}
TREE
{
	st_mult1::(0,0):(0): st_mult1.edf
	{
		carry_sum:4:(600,0):(184,un4_result_add30_cry): carry_sum.tdf;
		carry_sum:4:(594,0):(183,un4_result_add29_cry): carry_sum.tdf;
		carry_sum:4:(588,0):(182,un4_result_add28_cry): carry_sum.tdf;
		carry_sum:4:(582,0):(181,un4_result_add27_cry): carry_sum.tdf;
		carry_sum:4:(576,0):(180,un4_result_add26_cry): carry_sum.tdf;
		carry_sum:4:(570,0):(179,un4_result_add25_cry): carry_sum.tdf;
		carry_sum:4:(564,0):(178,un4_result_add24_cry): carry_sum.tdf;
		carry_sum:4:(558,0):(177,un4_result_add23_cry): carry_sum.tdf;
		carry_sum:4:(552,0):(176,un4_result_add22_cry): carry_sum.tdf;
		carry_sum:4:(546,0):(175,un4_result_add21_cry): carry_sum.tdf;
		carry_sum:4:(540,0):(174,un4_result_add20_cry): carry_sum.tdf;
		carry_sum:4:(534,0):(173,un4_result_add19_cry): carry_sum.tdf;
		carry_sum:4:(528,0):(172,un4_result_add18_cry): carry_sum.tdf;
		carry_sum:4:(522,0):(171,un4_result_add17_cry): carry_sum.tdf;
		carry_sum:4:(516,0):(170,un4_result_add16_cry): carry_sum.tdf;
		carry_sum:4:(510,0):(169,un4_result_add15_cry): carry_sum.tdf;
		carry_sum:4:(504,0):(168,un4_result_add14_cry): carry_sum.tdf;
		carry_sum:4:(498,0):(167,un4_result_add13_cry): carry_sum.tdf;
		carry_sum:4:(492,0):(166,un4_result_add12_cry): carry_sum.tdf;
		carry_sum:4:(486,0):(165,un4_result_add11_cry): carry_sum.tdf;
		carry_sum:4:(480,0):(164,un4_result_add10_cry): carry_sum.tdf;
		carry_sum:4:(474,0):(163,un4_result_add9_cry): carry_sum.tdf;
		carry_sum:4:(468,0):(162,un4_result_add8_cry): carry_sum.tdf;
		carry_sum:4:(462,0):(161,un4_result_add7_cry): carry_sum.tdf;
		carry_sum:4:(456,0):(160,un4_result_add6_cry): carry_sum.tdf;
		carry_sum:4:(450,0):(159,un4_result_add5_cry): carry_sum.tdf;
		carry_sum:4:(444,0):(158,un4_result_add4_cry): carry_sum.tdf;
		carry_sum:4:(438,0):(157,un4_result_add3_cry): carry_sum.tdf;
		carry_sum:4:(432,0):(156,un4_result_add2_cry): carry_sum.tdf;
		carry_sum:4:(426,0):(155,un4_result_add1_cry): carry_sum.tdf;
		carry_sum:4:(420,0):(154,un4_result_add0_cry): carry_sum.tdf;
		lpm_latch:3:(414,0):(153,bei_cheng_shu_Temp_18_): lpm_latch.tdf;
		lpm_latch:3:(411,0):(152,bei_cheng_shu_Temp_19_): lpm_latch.tdf;
		lpm_latch:3:(408,0):(151,bei_cheng_shu_Temp_20_): lpm_latch.tdf;
		lpm_latch:3:(405,0):(150,bei_cheng_shu_Temp_21_): lpm_latch.tdf;
		lpm_latch:3:(402,0):(149,bei_cheng_shu_Temp_22_): lpm_latch.tdf;
		lpm_latch:3:(399,0):(148,bei_cheng_shu_Temp_23_): lpm_latch.tdf;
		lpm_latch:3:(396,0):(147,bei_cheng_shu_Temp_24_): lpm_latch.tdf;
		lpm_latch:3:(393,0):(146,bei_cheng_shu_Temp_25_): lpm_latch.tdf;
		lpm_latch:3:(390,0):(145,bei_cheng_shu_Temp_26_): lpm_latch.tdf;
		lpm_latch:3:(387,0):(144,bei_cheng_shu_Temp_27_): lpm_latch.tdf;
		lpm_latch:3:(384,0):(143,bei_cheng_shu_Temp_28_): lpm_latch.tdf;
		lpm_latch:3:(381,0):(142,bei_cheng_shu_Temp_29_): lpm_latch.tdf;
		lpm_latch:3:(378,0):(141,bei_cheng_shu_Temp_30_): lpm_latch.tdf;
		lpm_latch:3:(375,0):(140,bei_cheng_shu_Temp_31_): lpm_latch.tdf;
		lpm_latch:3:(372,0):(139,bei_cheng_shu_Temp_3_): lpm_latch.tdf;
		lpm_latch:3:(369,0):(138,bei_cheng_shu_Temp_4_): lpm_latch.tdf;
		lpm_latch:3:(366,0):(137,bei_cheng_shu_Temp_5_): lpm_latch.tdf;
		lpm_latch:3:(363,0):(136,bei_cheng_shu_Temp_6_): lpm_latch.tdf;
		lpm_latch:3:(360,0):(135,bei_cheng_shu_Temp_7_): lpm_latch.tdf;
		lpm_latch:3:(357,0):(134,bei_cheng_shu_Temp_8_): lpm_latch.tdf;
		lpm_latch:3:(354,0):(133,bei_cheng_shu_Temp_9_): lpm_latch.tdf;
		lpm_latch:3:(351,0):(132,bei_cheng_shu_Temp_10_): lpm_latch.tdf;
		lpm_latch:3:(348,0):(131,bei_cheng_shu_Temp_11_): lpm_latch.tdf;
		lpm_latch:3:(345,0):(130,bei_cheng_shu_Temp_12_): lpm_latch.tdf;
		lpm_latch:3:(342,0):(129,bei_cheng_shu_Temp_13_): lpm_latch.tdf;
		lpm_latch:3:(339,0):(128,bei_cheng_shu_Temp_14_): lpm_latch.tdf;
		lpm_latch:3:(336,0):(127,bei_cheng_shu_Temp_15_): lpm_latch.tdf;
		lpm_latch:3:(333,0):(126,bei_cheng_shu_Temp_16_): lpm_latch.tdf;
		lpm_latch:3:(330,0):(125,bei_cheng_shu_Temp_17_): lpm_latch.tdf;
		lpm_latch:3:(327,0):(124,cheng_shu_temp_9_): lpm_latch.tdf;
		lpm_latch:3:(324,0):(123,cheng_shu_temp_10_): lpm_latch.tdf;
		lpm_latch:3:(321,0):(122,cheng_shu_temp_11_): lpm_latch.tdf;
		lpm_latch:3:(318,0):(121,cheng_shu_temp_12_): lpm_latch.tdf;
		lpm_latch:3:(315,0):(120,cheng_shu_temp_13_): lpm_latch.tdf;
		lpm_latch:3:(312,0):(119,cheng_shu_temp_14_): lpm_latch.tdf;
		lpm_latch:3:(309,0):(118,cheng_shu_temp_15_): lpm_latch.tdf;
		lpm_latch:3:(306,0):(117,count_0_): lpm_latch.tdf;
		lpm_latch:3:(303,0):(116,count_1_): lpm_latch.tdf;
		lpm_latch:3:(300,0):(115,count_2_): lpm_latch.tdf;
		lpm_latch:3:(297,0):(114,count_3_): lpm_latch.tdf;
		lpm_latch:3:(294,0):(113,count_4_): lpm_latch.tdf;
		lpm_latch:3:(291,0):(112,bei_cheng_shu_Temp_0_): lpm_latch.tdf;
		lpm_latch:3:(288,0):(111,bei_cheng_shu_Temp_1_): lpm_latch.tdf;
		lpm_latch:3:(285,0):(110,bei_cheng_shu_Temp_2_): lpm_latch.tdf;
		lpm_latch:1:(282,0):(109,result_26_): lpm_latch.tdf;
		lpm_latch:1:(279,0):(108,result_27_): lpm_latch.tdf;
		lpm_latch:1:(276,0):(107,result_28_): lpm_latch.tdf;
		lpm_latch:1:(273,0):(106,result_29_): lpm_latch.tdf;
		lpm_latch:1:(270,0):(105,result_30_): lpm_latch.tdf;
		lpm_latch:1:(267,0):(104,result_31_): lpm_latch.tdf;
		lpm_latch:3:(264,0):(103,cheng_shu_temp_0_): lpm_latch.tdf;
		lpm_latch:3:(261,0):(102,cheng_shu_temp_1_): lpm_latch.tdf;
		lpm_latch:3:(258,0):(101,cheng_shu_temp_2_): lpm_latch.tdf;
		lpm_latch:3:(255,0):(100,cheng_shu_temp_3_): lpm_latch.tdf;
		lpm_latch:3:(252,0):(99,cheng_shu_temp_4_): lpm_latch.tdf;
		lpm_latch:3:(249,0):(98,cheng_shu_temp_5_): lpm_latch.tdf;
		lpm_latch:3:(246,0):(97,cheng_shu_temp_6_): lpm_latch.tdf;
		lpm_latch:3:(243,0):(96,cheng_shu_temp_7_): lpm_latch.tdf;
		lpm_latch:3:(240,0):(95,cheng_shu_temp_8_): lpm_latch.tdf;
		lpm_latch:1:(237,0):(94,result_11_): lpm_latch.tdf;
		lpm_latch:1:(234,0):(93,result_12_): lpm_latch.tdf;
		lpm_latch:1:(231,0):(92,result_13_): lpm_latch.tdf;
		lpm_latch:1:(228,0):(91,result_14_): lpm_latch.tdf;
		lpm_latch:1:(225,0):(90,result_15_): lpm_latch.tdf;
		lpm_latch:1:(222,0):(89,result_16_): lpm_latch.tdf;
		lpm_latch:1:(219,0):(88,result_17_): lpm_latch.tdf;
		lpm_latch:1:(216,0):(87,result_18_): lpm_latch.tdf;
		lpm_latch:1:(213,0):(86,result_19_): lpm_latch.tdf;
		lpm_latch:1:(210,0):(85,result_20_): lpm_latch.tdf;
		lpm_latch:1:(207,0):(84,result_21_): lpm_latch.tdf;
		lpm_latch:1:(204,0):(83,result_22_): lpm_latch.tdf;
		lpm_latch:1:(201,0):(82,result_23_): lpm_latch.tdf;
		lpm_latch:1:(198,0):(81,result_24_): lpm_latch.tdf;
		lpm_latch:1:(195,0):(80,result_25_): lpm_latch.tdf;
		lpm_latch:2:(191,0):(79,ok1): lpm_latch.tdf;
		lpm_latch:1:(188,0):(78,result_0_): lpm_latch.tdf;
		lpm_latch:1:(185,0):(77,result_1_): lpm_latch.tdf;
		lpm_latch:1:(182,0):(76,result_2_): lpm_latch.tdf;
		lpm_latch:1:(179,0):(75,result_3_): lpm_latch.tdf;
		lpm_latch:1:(176,0):(74,result_4_): lpm_latch.tdf;
		lpm_latch:1:(173,0):(73,result_5_): lpm_latch.tdf;
		lpm_latch:1:(170,0):(72,result_6_): lpm_latch.tdf;
		lpm_latch:1:(167,0):(71,result_7_): lpm_latch.tdf;
		lpm_latch:1:(164,0):(70,result_8_): lpm_latch.tdf;
		lpm_latch:1:(161,0):(69,result_9_): lpm_latch.tdf;
		lpm_latch:1:(158,0):(68,result_10_): lpm_latch.tdf;
	}
}