📄 lcdkey.vhd
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;
entity lcdkey is
Port ( lcd_lightkey : in std_logic;
lcd_modekey : in std_logic;
lcd_lightbuf : out std_logic;
lcd_modebuf : out std_logic_vector(1 downto 0);
sysclk : in std_logic);
end lcdkey;
architecture Behavioral of lcdkey is
signal shiftlightkey,shiftmodekey:std_logic_vector(15 downto 0);
signal lightbuf:std_logic;
signal modebuf:std_logic_vector(1 downto 0);
signal counter:integer range 0 to 500000000;
begin
key_handle:
process(sysclk)
begin
if sysclk'event and sysclk='1' then
counter<=counter+1;
shiftlightkey<=lcd_lightkey & shiftlightkey(15 downto 1);
shiftmodekey<=lcd_modekey & shiftmodekey(15 downto 1);
if shiftlightkey=x"0001" then
lightbuf<=not lightbuf;
end if;
if shiftmodekey=x"0001" then
modebuf<=modebuf+1;
elsif counter>=250000000 then
counter<=0;
modebuf<=modebuf+1;
end if;
end if;
end process;
lcd_lightbuf<=lightbuf;
lcd_modebuf<=modebuf;
end Behavioral;
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