yinyue.rpt

一个使用VHDL编写的音乐芯片的程序有很好的使用价值

Project Information                                          c:\wxd\yinyue.rpt

MAX+plus II Compiler Report File
Version 10.0 9/14/2000
Compiled: 10/26/2004 17:30:06

Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input Output Bidir  Memory  Memory  			 LCs
POF       Device          Pins  Pins   Pins   Bits % Utilized  LCs  % Utilized

yinyue    EPF10K10LC84-4   2      1      0    0         0  %    375      65 %

User Pins:                 2      1      0  



Project Information                                          c:\wxd\yinyue.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

yinyue@43                         clk
yinyue@29                         spk
yinyue@30                         sw20


Project Information                                          c:\wxd\yinyue.rpt

** FILE HIERARCHY **



|fp:1|
|fp:1|lpm_add_sub:147|
|fp:1|lpm_add_sub:147|addcore:adder|
|fp:1|lpm_add_sub:147|altshift:result_ext_latency_ffs|
|fp:1|lpm_add_sub:147|altshift:carry_ext_latency_ffs|
|fp:1|lpm_add_sub:147|altshift:oflow_ext_latency_ffs|
|music:2|
|music:2|sepratef:u0|
|music:2|sepratef:u0|lpm_add_sub:144|
|music:2|sepratef:u0|lpm_add_sub:144|addcore:adder|
|music:2|sepratef:u0|lpm_add_sub:144|altshift:result_ext_latency_ffs|
|music:2|sepratef:u0|lpm_add_sub:144|altshift:carry_ext_latency_ffs|
|music:2|sepratef:u0|lpm_add_sub:144|altshift:oflow_ext_latency_ffs|
|music:2|rhythmer:u1|
|music:2|rhythmer:u1|lpm_add_sub:106|
|music:2|rhythmer:u1|lpm_add_sub:106|addcore:adder|
|music:2|rhythmer:u1|lpm_add_sub:106|altshift:result_ext_latency_ffs|
|music:2|rhythmer:u1|lpm_add_sub:106|altshift:carry_ext_latency_ffs|
|music:2|rhythmer:u1|lpm_add_sub:106|altshift:oflow_ext_latency_ffs|
|music:2|tonetaba:u2|
|music:2|speakera:u3|
|music:2|speakera:u3|lpm_add_sub:61|
|music:2|speakera:u3|lpm_add_sub:61|addcore:adder|
|music:2|speakera:u3|lpm_add_sub:61|altshift:result_ext_latency_ffs|
|music:2|speakera:u3|lpm_add_sub:61|altshift:carry_ext_latency_ffs|
|music:2|speakera:u3|lpm_add_sub:61|altshift:oflow_ext_latency_ffs|
|music:2|speakera:u3|lpm_add_sub:176|
|music:2|speakera:u3|lpm_add_sub:176|addcore:adder|
|music:2|speakera:u3|lpm_add_sub:176|altshift:result_ext_latency_ffs|
|music:2|speakera:u3|lpm_add_sub:176|altshift:carry_ext_latency_ffs|
|music:2|speakera:u3|lpm_add_sub:176|altshift:oflow_ext_latency_ffs|


Device-Specific Information:                                 c:\wxd\yinyue.rpt
yinyue

***** Logic for device 'yinyue' compiled without errors.




Device: EPF10K10LC84-4

FLEX 10K Configuration Scheme: Passive Serial

Device Options:
    User-Supplied Start-Up Clock               = OFF
    Auto-Restart Configuration on Frame Error  = OFF
    Release Clears Before Tri-States           = OFF
    Enable Chip_Wide Reset                     = OFF
    Enable Chip-Wide Output Enable             = OFF
    Enable INIT_DONE Output                    = OFF
    JTAG User Code                             = 7f

                                                                         ^     
                                                                         C     
                R  R  R  R  R  R  R     R           R     R  R  R  R     O     
                E  E  E  E  E  E  E     E           E     E  E  E  E     N     
                S  S  S  S  S  S  S  V  S  G  G  G  S  G  S  S  S  S     F     
                E  E  E  E  E  E  E  C  E  N  N  N  E  N  E  E  E  E     _  ^  
                R  R  R  R  R  R  R  C  R  D  D  D  R  D  R  R  R  R  #  D  n  
                V  V  V  V  V  V  V  I  V  I  I  I  V  I  V  V  V  V  T  O  C  
                E  E  E  E  E  E  E  N  E  N  N  N  E  N  E  E  E  E  C  N  E  
                D  D  D  D  D  D  D  T  D  T  T  T  D  T  D  D  D  D  K  E  O  
              -----------------------------------------------------------------_ 
            /  11 10  9  8  7  6  5  4  3  2  1 84 83 82 81 80 79 78 77 76 75   | 
    ^DATA0 | 12                                                              74 | #TDO 
     ^DCLK | 13                                                              73 | RESERVED 
      ^nCE | 14                                                              72 | RESERVED 
      #TDI | 15                                                              71 | RESERVED 
  RESERVED | 16                                                              70 | RESERVED 
  RESERVED | 17                                                              69 | RESERVED 
  RESERVED | 18                                                              68 | GNDINT 
  RESERVED | 19                                                              67 | RESERVED 
    VCCINT | 20                                                              66 | RESERVED 
  RESERVED | 21                                                              65 | RESERVED 
  RESERVED | 22                        EPF10K10LC84-4                        64 | RESERVED 
  RESERVED | 23                                                              63 | VCCINT 
  RESERVED | 24                                                              62 | RESERVED 
  RESERVED | 25                                                              61 | RESERVED 
    GNDINT | 26                                                              60 | RESERVED 
  RESERVED | 27                                                              59 | RESERVED 
  RESERVED | 28                                                              58 | RESERVED 
       spk | 29                                                              57 | #TMS 
      sw20 | 30                                                              56 | #TRST 
    ^MSEL0 | 31                                                              55 | ^nSTATUS 
    ^MSEL1 | 32                                                              54 | RESERVED 
           |_  33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53  _| 
             ------------------------------------------------------------------ 
                V  ^  R  R  R  R  R  V  G  G  c  G  V  G  R  R  R  R  R  R  R  
                C  n  E  E  E  E  E  C  N  N  l  N  C  N  E  E  E  E  E  E  E  
                C  C  S  S  S  S  S  C  D  D  k  D  C  D  S  S  S  S  S  S  S  
                I  O  E  E  E  E  E  I  I  I     I  I  I  E  E  E  E  E  E  E  
                N  N  R  R  R  R  R  N  N  N     N  N  N  R  R  R  R  R  R  R  
                T  F  V  V  V  V  V  T  T  T     T  T  T  V  V  V  V  V  V  V  
                   I  E  E  E  E  E                       E  E  E  E  E  E  E  
                   G  D  D  D  D  D                       D  D  D  D  D  D  D  
                                                                               
                                                                               


N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.

^ = Dedicated configuration pin.
+ = Reserved configuration pin, which is tri-stated during user mode.
* = Reserved configuration pin, which drives out in user mode.
PDn = Power Down pin. 
@ = Special-purpose pin. 
# = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use.
& = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration.  JTAG pin stability prevents accidental loading of JTAG instructions.


Device-Specific Information:                                 c:\wxd\yinyue.rpt
yinyue