📄 clkdiv.rpt
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_EQ019 = clk_count18 & _LC7_B11 & !_LC8_B7
# !clk_count18 & _LC7_B11 & _LC8_B7;
-- Node name is ':177' = 'clk_count19'
-- Equation name is 'clk_count19', location is LC4_B2, type is buried.
clk_count19 = DFFE( _EQ020, GLOBAL( clkin), VCC, VCC, VCC);
_EQ020 = !clk_count18 & clk_count19 & _LC7_B11
# clk_count19 & _LC7_B11 & !_LC8_B7
# clk_count18 & !clk_count19 & _LC7_B11 & _LC8_B7;
-- Node name is ':176' = 'clk_count20'
-- Equation name is 'clk_count20', location is LC6_B11, type is buried.
clk_count20 = DFFE( _EQ021, GLOBAL( clkin), VCC, VCC, VCC);
_EQ021 = clk_count20 & _LC7_B11 & !_LC8_B2
# !clk_count20 & _LC7_B11 & _LC8_B2;
-- Node name is ':175' = 'clk_count21'
-- Equation name is 'clk_count21', location is LC5_B11, type is buried.
clk_count21 = DFFE( _EQ022, GLOBAL( clkin), VCC, VCC, VCC);
_EQ022 = clk_count21 & !_LC2_B11 & _LC7_B11
# !clk_count21 & _LC2_B11 & _LC7_B11;
-- Node name is ':174' = 'clk_count22'
-- Equation name is 'clk_count22', location is LC8_B11, type is buried.
clk_count22 = DFFE( _EQ023, GLOBAL( clkin), VCC, VCC, VCC);
_EQ023 = !clk_count21 & clk_count22 & _LC7_B11
# clk_count22 & !_LC2_B11 & _LC7_B11
# clk_count21 & !clk_count22 & _LC2_B11 & _LC7_B11;
-- Node name is 'clkout'
-- Equation name is 'clkout', type is output
clkout = _LC4_B11;
-- Node name is '|lpm_add_sub:201|addcore:adder|:135' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_B6', type is buried
!_LC2_B6 = _LC2_B6~NOT;
_LC2_B6~NOT = LCELL( _EQ024);
_EQ024 = !clk_count2
# !clk_count0
# !clk_count1;
-- Node name is '|lpm_add_sub:201|addcore:adder|:139' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC4_B6', type is buried
!_LC4_B6 = _LC4_B6~NOT;
_LC4_B6~NOT = LCELL( _EQ025);
_EQ025 = !clk_count3
# !_LC2_B6;
-- Node name is '|lpm_add_sub:201|addcore:adder|:151' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC3_B5', type is buried
_LC3_B5 = LCELL( _EQ026);
_EQ026 = clk_count4 & clk_count5 & clk_count6 & _LC4_B6;
-- Node name is '|lpm_add_sub:201|addcore:adder|:155' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC1_B11', type is buried
_LC1_B11 = LCELL( _EQ027);
_EQ027 = clk_count7 & _LC3_B5;
-- Node name is '|lpm_add_sub:201|addcore:adder|:163' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC5_B5', type is buried
_LC5_B5 = LCELL( _EQ028);
_EQ028 = clk_count7 & clk_count8 & clk_count9 & _LC3_B5;
-- Node name is '|lpm_add_sub:201|addcore:adder|:171' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_B2', type is buried
_LC6_B2 = LCELL( _EQ029);
_EQ029 = clk_count10 & clk_count11 & _LC5_B5;
-- Node name is '|lpm_add_sub:201|addcore:adder|:175' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC3_B2', type is buried
_LC3_B2 = LCELL( _EQ030);
_EQ030 = clk_count10 & clk_count11 & clk_count12 & _LC5_B5;
-- Node name is '|lpm_add_sub:201|addcore:adder|:183' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_B8', type is buried
_LC8_B8 = LCELL( _EQ031);
_EQ031 = clk_count13 & clk_count14 & _LC3_B2;
-- Node name is '|lpm_add_sub:201|addcore:adder|:187' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC5_B7', type is buried
_LC5_B7 = LCELL( _EQ032);
_EQ032 = clk_count13 & clk_count14 & clk_count15 & _LC3_B2;
-- Node name is '|lpm_add_sub:201|addcore:adder|:195' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_B7', type is buried
_LC8_B7 = LCELL( _EQ033);
_EQ033 = clk_count16 & clk_count17 & _LC5_B7;
-- Node name is '|lpm_add_sub:201|addcore:adder|:203' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC8_B2', type is buried
_LC8_B2 = LCELL( _EQ034);
_EQ034 = clk_count18 & clk_count19 & _LC8_B7;
-- Node name is '|lpm_add_sub:201|addcore:adder|:207' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_B11', type is buried
_LC2_B11 = LCELL( _EQ035);
_EQ035 = clk_count18 & clk_count19 & clk_count20 & _LC8_B7;
-- Node name is ':12'
-- Equation name is '_LC7_B11', type is buried
_LC7_B11 = LCELL( _EQ036);
_EQ036 = !clk_count22
# !clk_count20 & !clk_count21 & _LC1_B7;
-- Node name is ':27'
-- Equation name is '_LC1_B7', type is buried
_LC1_B7 = LCELL( _EQ037);
_EQ037 = !clk_count17 & _LC3_B7
# !clk_count18
# !clk_count19;
-- Node name is '~34~1'
-- Equation name is '~34~1', location is LC3_B7, type is buried.
-- synthesized logic cell
_LC3_B7 = LCELL( _EQ038);
_EQ038 = !clk_count14 & !clk_count15 & !clk_count16
# !clk_count15 & !clk_count16 & _LC2_B2;
-- Node name is ':54'
-- Equation name is '_LC2_B2', type is buried
_LC2_B2 = LCELL( _EQ039);
_EQ039 = !clk_count11 & !clk_count12 & !clk_count13
# !clk_count12 & !clk_count13 & _LC6_B5;
-- Node name is ':69'
-- Equation name is '_LC6_B5', type is buried
_LC6_B5 = LCELL( _EQ040);
_EQ040 = !clk_count10 & _LC2_B5
# !clk_count8 & !clk_count10
# !clk_count9 & !clk_count10;
-- Node name is ':84'
-- Equation name is '_LC2_B5', type is buried
_LC2_B5 = LCELL( _EQ041);
_EQ041 = !clk_count6 & !clk_count7 & _LC1_B5;
-- Node name is ':97'
-- Equation name is '_LC1_B5', type is buried
_LC1_B5 = LCELL( _EQ042);
_EQ042 = !clk_count5
# !clk_count4
# !_LC4_B6;
-- Node name is ':200'
-- Equation name is '_LC4_B11', type is buried
_LC4_B11 = DFFE( _EQ043, GLOBAL( clkin), VCC, VCC, VCC);
_EQ043 = clk_count21 & clk_count22
# clk_count20 & clk_count22
# clk_count22 & !_LC1_B7;
Project Information e:\amj\eda\2003\experiment\phone\clkdiv.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'FLEX10K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:01
Database Builder 00:00:00
Logic Synthesizer 00:00:00
Partitioner 00:00:03
Fitter 00:00:03
Timing SNF Extractor 00:00:00
Assembler 00:00:01
-------------------------- --------
Total Time 00:00:08
Memory Allocated
-----------------
Peak memory allocated during compilation = 13,449K
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