phone.tan.qmsg

卡式计费电话电路,用verilogHDL编写,主要完成模拟真实电话的功能

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk " "Info: Assuming node \"clk\" is an undefined clock" {  } { { "account_top.bdf" "" { Schematic "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account_top.bdf" { { 544 336 504 560 "clk" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } }  } 0}  } {  } 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "1 " "Warning: Found 1 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "clkdiv:33\|clkout " "Info: Detected ripple clock \"clkdiv:33\|clkout\" as buffer" {  } { { "clkdiv.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/clkdiv.v" 6 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clkdiv:33\|clkout" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register account2:inst2\|state_reg register account2:inst2\|warn 72.22 MHz 13.846 ns Internal " "Info: Clock \"clk\" has Internal fmax of 72.22 MHz between source register \"account2:inst2\|state_reg\" and destination register \"account2:inst2\|warn\" (period= 13.846 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.662 ns + Longest register register " "Info: + Longest register to register delay is 6.662 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns account2:inst2\|state_reg 1 REG LC_X3_Y22_N7 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X3_Y22_N7; Fanout = 8; REG Node = 'account2:inst2\|state_reg'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "" { account2:inst2|state_reg } "NODE_NAME" } "" } } { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 33 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.551 ns) + CELL(0.590 ns) 1.141 ns account2:inst2\|always5~24 2 COMB LC_X3_Y22_N2 11 " "Info: 2: + IC(0.551 ns) + CELL(0.590 ns) = 1.141 ns; Loc. = LC_X3_Y22_N2; Fanout = 11; COMB Node = 'account2:inst2\|always5~24'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "1.141 ns" { account2:inst2|state_reg account2:inst2|always5~24 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.951 ns) + CELL(0.292 ns) 3.384 ns account2:inst2\|warn~222 3 COMB LC_X3_Y23_N8 8 " "Info: 3: + IC(1.951 ns) + CELL(0.292 ns) = 3.384 ns; Loc. = LC_X3_Y23_N8; Fanout = 8; COMB Node = 'account2:inst2\|warn~222'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "2.243 ns" { account2:inst2|always5~24 account2:inst2|warn~222 } "NODE_NAME" } "" } } { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 29 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.230 ns) + CELL(0.114 ns) 4.728 ns account2:inst2\|warn~223 4 COMB LC_X4_Y24_N0 1 " "Info: 4: + IC(1.230 ns) + CELL(0.114 ns) = 4.728 ns; Loc. = LC_X4_Y24_N0; Fanout = 1; COMB Node = 'account2:inst2\|warn~223'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "1.344 ns" { account2:inst2|warn~222 account2:inst2|warn~223 } "NODE_NAME" } "" } } { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 29 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.196 ns) + CELL(0.738 ns) 6.662 ns account2:inst2\|warn 5 REG LC_X4_Y22_N3 6 " "Info: 5: + IC(1.196 ns) + CELL(0.738 ns) = 6.662 ns; Loc. = LC_X4_Y22_N3; Fanout = 6; REG Node = 'account2:inst2\|warn'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "1.934 ns" { account2:inst2|warn~223 account2:inst2|warn } "NODE_NAME" } "" } } { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 29 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.734 ns 26.03 % " "Info: Total cell delay = 1.734 ns ( 26.03 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.928 ns 73.97 % " "Info: Total interconnect delay = 4.928 ns ( 73.97 % )" {  } {  } 0}  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "6.662 ns" { account2:inst2|state_reg account2:inst2|always5~24 account2:inst2|warn~222 account2:inst2|warn~223 account2:inst2|warn } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "6.662 ns" { account2:inst2|state_reg account2:inst2|always5~24 account2:inst2|warn~222 account2:inst2|warn~223 account2:inst2|warn } { 0.000ns 0.551ns 1.951ns 1.230ns 1.196ns } { 0.000ns 0.590ns 0.292ns 0.114ns 0.738ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 7.790 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 7.790 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_28 24 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 24; CLK Node = 'clk'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "" { clk } "NODE_NAME" } "" } } { "account_top.bdf" "" { Schematic "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account_top.bdf" { { 544 336 504 560 "clk" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.030 ns) + CELL(0.935 ns) 3.434 ns clkdiv:33\|clkout 2 REG LC_X8_Y13_N9 123 " "Info: 2: + IC(1.030 ns) + CELL(0.935 ns) = 3.434 ns; Loc. = LC_X8_Y13_N9; Fanout = 123; REG Node = 'clkdiv:33\|clkout'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "1.965 ns" { clk clkdiv:33|clkout } "NODE_NAME" } "" } } { "clkdiv.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/clkdiv.v" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.645 ns) + CELL(0.711 ns) 7.790 ns account2:inst2\|warn 3 REG LC_X4_Y22_N3 6 " "Info: 3: + IC(3.645 ns) + CELL(0.711 ns) = 7.790 ns; Loc. = LC_X4_Y22_N3; Fanout = 6; REG Node = 'account2:inst2\|warn'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "4.356 ns" { clkdiv:33|clkout account2:inst2|warn } "NODE_NAME" } "" } } { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 29 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns 39.99 % " "Info: Total cell delay = 3.115 ns ( 39.99 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.675 ns 60.01 % " "Info: Total interconnect delay = 4.675 ns ( 60.01 % )" {  } {  } 0}  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "7.790 ns" { clk clkdiv:33|clkout account2:inst2|warn } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.790 ns" { clk clk~out0 clkdiv:33|clkout account2:inst2|warn } { 0.000ns 0.000ns 1.030ns 3.645ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 7.790 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 7.790 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clk 1 CLK PIN_28 24 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 24; CLK Node = 'clk'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "" { clk } "NODE_NAME" } "" } } { "account_top.bdf" "" { Schematic "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account_top.bdf" { { 544 336 504 560 "clk" "" } } } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.030 ns) + CELL(0.935 ns) 3.434 ns clkdiv:33\|clkout 2 REG LC_X8_Y13_N9 123 " "Info: 2: + IC(1.030 ns) + CELL(0.935 ns) = 3.434 ns; Loc. = LC_X8_Y13_N9; Fanout = 123; REG Node = 'clkdiv:33\|clkout'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "1.965 ns" { clk clkdiv:33|clkout } "NODE_NAME" } "" } } { "clkdiv.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/clkdiv.v" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.645 ns) + CELL(0.711 ns) 7.790 ns account2:inst2\|state_reg 3 REG LC_X3_Y22_N7 8 " "Info: 3: + IC(3.645 ns) + CELL(0.711 ns) = 7.790 ns; Loc. = LC_X3_Y22_N7; Fanout = 8; REG Node = 'account2:inst2\|state_reg'" {  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "4.356 ns" { clkdiv:33|clkout account2:inst2|state_reg } "NODE_NAME" } "" } } { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 33 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns 39.99 % " "Info: Total cell delay = 3.115 ns ( 39.99 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.675 ns 60.01 % " "Info: Total interconnect delay = 4.675 ns ( 60.01 % )" {  } {  } 0}  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "7.790 ns" { clk clkdiv:33|clkout account2:inst2|state_reg } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.790 ns" { clk clk~out0 clkdiv:33|clkout account2:inst2|state_reg } { 0.000ns 0.000ns 1.030ns 3.645ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0}  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "7.790 ns" { clk clkdiv:33|clkout account2:inst2|warn } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.790 ns" { clk clk~out0 clkdiv:33|clkout account2:inst2|warn } { 0.000ns 0.000ns 1.030ns 3.645ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "7.790 ns" { clk clkdiv:33|clkout account2:inst2|state_reg } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.790 ns" { clk clk~out0 clkdiv:33|clkout account2:inst2|state_reg } { 0.000ns 0.000ns 1.030ns 3.645ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 33 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 29 -1 0 } }  } 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50, fmax is divided by two" {  } { { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 33 -1 0 } } { "account2.v" "" { Text "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/account2.v" 29 -1 0 } }  } 0}  } { { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "6.662 ns" { account2:inst2|state_reg account2:inst2|always5~24 account2:inst2|warn~222 account2:inst2|warn~223 account2:inst2|warn } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "6.662 ns" { account2:inst2|state_reg account2:inst2|always5~24 account2:inst2|warn~222 account2:inst2|warn~223 account2:inst2|warn } { 0.000ns 0.551ns 1.951ns 1.230ns 1.196ns } { 0.000ns 0.590ns 0.292ns 0.114ns 0.738ns } } } { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "7.790 ns" { clk clkdiv:33|clkout account2:inst2|warn } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.790 ns" { clk clk~out0 clkdiv:33|clkout account2:inst2|warn } { 0.000ns 0.000ns 1.030ns 3.645ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" "" { Report "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone_cmp.qrpt" Compiler "phone" "UNKNOWN" "V1" "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/db/phone.quartus_db" { Floorplan "D:/老d/老师的任务/EDA/2005_experiment/2005_experiment/phone/" "" "7.790 ns" { clk clkdiv:33|clkout account2:inst2|state_reg } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "7.790 ns" { clk clk~out0 clkdiv:33|clkout account2:inst2|state_reg } { 0.000ns 0.000ns 1.030ns 3.645ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0}