📄 tiaoping.qsf
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# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
# The default values for assignments are stored in the file
# tiaoping_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
# assignment_defaults.qdf
# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 5.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "09:04:01 DECEMBER 08, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VHDL_FILE tiaoping.vhd
set_global_assignment -name VECTOR_WAVEFORM_FILE tiaoping.vwf
# Pin & Location Assignments
# ==========================
set_location_assignment PIN_18 -to xlat
set_location_assignment PIN_10 -to wr
set_location_assignment PIN_13 -to serial_or
set_location_assignment PIN_12 -to serial_og
set_location_assignment PIN_11 -to rd
set_location_assignment PIN_6 -to sel_out3
set_location_assignment PIN_35 -to sel_out2
set_location_assignment PIN_5 -to sel_out1
set_location_assignment PIN_3 -to sel_out0
set_location_assignment PIN_43 -to sel_addr1
set_location_assignment PIN_44 -to sel_addr0
set_location_assignment PIN_2 -to p1_4
set_location_assignment PIN_8 -to p1_3
set_location_assignment PIN_14 -to oe_out
set_location_assignment PIN_23 -to din[7]
set_location_assignment PIN_25 -to din[6]
set_location_assignment PIN_27 -to din[5]
set_location_assignment PIN_28 -to din[4]
set_location_assignment PIN_30 -to din[3]
set_location_assignment PIN_31 -to din[2]
set_location_assignment PIN_33 -to din[1]
set_location_assignment PIN_34 -to din[0]
set_location_assignment PIN_15 -to clk_out
set_location_assignment PIN_42 -to cpld_sel
set_location_assignment PIN_19 -to addr_out3
set_location_assignment PIN_20 -to addr_out2
set_location_assignment PIN_21 -to addr_out1
set_location_assignment PIN_22 -to addr_out0
set_location_assignment PIN_40 -to d_sel
set_location_assignment PIN_39 -to p1_6
set_location_assignment PIN_38 -to p1_5
set_location_assignment PIN_37 -to clk
# Timing Assignments
# ==================
set_global_assignment -name CUT_OFF_READ_DURING_WRITE_PATHS OFF
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY MAX7000AE
set_global_assignment -name TOP_LEVEL_ENTITY tiaoping
# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EPM7064AETC44-10"
set_global_assignment -name MAX7000B_VCCIO_IOBANK2 3.3V
set_global_assignment -name MAX7000B_VCCIO_IOBANK1 3.3V
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
# Timing Analysis Assignments
# ===========================
set_global_assignment -name EXCLUDE_TPD_PATHS_LESS_THAN 0.0NS
# Assembler Assignments
# =====================
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
# Simulator Assignments
# =====================
set_global_assignment -name START_TIME 0.0ns
set_global_assignment -name GLITCH_DETECTION OFF
set_global_assignment -name GLITCH_INTERVAL "0.0 ns"
set_global_assignment -name END_TIME "10.0 ms"
set_global_assignment -name VECTOR_INPUT_SOURCE tiaoping.vwf
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