transcript

hrisc cpu

# Reading D:/MODELTECH_5.7/tcl/vsim/pref.tcl 
# vsim {F:\炓地\??悐瑨\opencores\RISC\RISC16f84\auto_baud_with_tracking.v} 
# ** Error: (vsim-19) Failed to access library 'work' at "work".
# No such file or directory. (errno = ENOENT)
# Error loading design
view source
# .source