📄 34_readwrite.vhd
字号:
package p is
attribute cycle_time:Time;
attribute max_cycles:Integer;
attribute clock_phases:Integer;
attribute Integer_width:Integer;
Type my_integer is range -2**15 to 2**15-1;
Type array_of_integer is array(1 to 16) of my_integer;
Type my_integer_Vector is array(Natural range<>) of my_integer;
FUNCTION wired_and (inputs : my_integer_Vector) RETURN my_integer;
end package p;
package body p is
FUNCTION wired_and (inputs : my_integer_Vector) RETURN my_integer IS
VARIABLE m: my_integer:=0;
BEGIN
IF inputs'Length=0 THEN
RETURN 0;
ELSE
FOR i IN inputs'Range LOOP
IF inputs(i)>m THEN
m:=inputs(i);
END IF;
END LOOP;
RETURN m;
END IF;
END;
end p;
Use work.p.all;
entity e is
port(bus1 : Inout wired_and my_integer;
bus_ready : In Bit);
attribute cycle_time of e : entity is 50 ns;
attribute clock_phases of e : entity is 1;
end e;
architecture arch of e is
begin
p1:Process
variable a :array_of_integer;
variable max:my_integer;
variable loop_time:time;
variable i:my_integer;
begin
--read bus
--read_bus(bus1,bus_ready,a)
loop_time :=Now;
ll1:for i in 1 to 16 loop
wait until bus_ready='1';
a(i):=bus1;
end loop ll1;
assert (Now-loop_time)<=(16*e'cycle_time) --revised by dls
report "loop took too long.";
--operate on a(modeled here just by a delay)
wait for 10 ns;
--find max(a)
max:=a(1);
ll2: for i in 2 to 16 loop
if a(i)>max then max:=a(i);
end if;
end loop ll2;
--bus gets max(a)
bus1<=max after 50 ns;
end process p1;
end arch;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -