63_gcd_disp.vhd

这是一个对于初学者很好的vhdl实验的一些例子,希望站长的支持哦

--
-- SRC-MODULE : GCD_DISP
-- NAME       : gcd.vhdl
-- VERSION    : 1.0
--
-- PURPOSE    : Architecture of GCD benchmark
--
-- LAST UPDATE: Wed May 19 13:03:48 MET DST 1993
--
--*******************************************************************
--
-- Architecture of GCD
--
PACKAGE types IS
--  SUBTYPE nat8  is bit_vector(7 DOWNTO 0);
  SUBTYPE nat8  is integer RANGE 255 DOWNTO 0;
  SUBTYPE a_dec is integer RANGE 9 DOWNTO 0;
END types;

USE work.types.all;

ENTITY gcd_disp IS
PORT(reset : IN bit;          -- Global reset
     clk   : IN bit;          -- Global clock
     rst   : IN bit;
     xin   : IN nat8;    
     yin   : IN nat8;   
     rdy   : OUT bit;   
     outp  : OUT nat8;  
     unit1 : OUT bit_vector(6 DOWNTO 0);
     unit2 : OUT bit_vector(6 DOWNTO 0);
     unit3 : OUT bit_vector(6 DOWNTO 0)
	 );
END gcd_disp;

ARCHITECTURE algorithm OF gcd_disp IS
BEGIN
  gcd: PROCESS
    VARIABLE   x     : nat8;
    VARIABLE   y     : nat8;
    VARIABLE   h     : nat8;
    VARIABLE   x100  : a_dec;
    VARIABLE   x10   : a_dec;
    VARIABLE   x1    : a_dec;
    VARIABLE   midx  : a_dec;

  BEGIN 

	midx := 1;
    rdy <= '0';
    outp<= 0;
    unit1<="0000000";
    unit2<="0000000";
    unit3<="0000000";

  RESET_LOOP : LOOP 

    WAIT UNTIL clk = '1';
	EXIT RESET_LOOP WHEN reset = '1';
    
    WHILE (rst = '1') LOOP
        x := xin;
        y := yin;
        WAIT UNTIL clk = '1'; 
		EXIT RESET_LOOP WHEN reset = '1';
    END LOOP;

	midx := 0;
    rdy <= '0';
    outp <= 0;

	WHILE (y /= 0) LOOP
		WHILE (x >= y) LOOP
			WAIT UNTIL clk = '1'; 
			EXIT RESET_LOOP WHEN reset = '1';
			x := x - y;
		END LOOP;
		h := x; x := y;
		WAIT UNTIL clk = '1'; 
		EXIT RESET_LOOP WHEN reset = '1';
		y := h;
	END LOOP;

	midx := 1;
    outp <= x;


-- decoder part of the display circuit:
-- 
--                   0                              6543210
--                -------                      0 :  1000000		40
--               |       |       unitX(6..0)   1 :  1111001		79
--              5|       |1                    2 :  0100100		24
--               |   6   |                     3 :  0110000		30
--                -------                      4 :  0011001		19
--               |       |                     5 :  0010010		12
--              4|       |2                    6 :  0000010		02
--               |       |                     7 :  1111000		78
--                -------                      8 :  0000000		00
--                   3                         9 :  0010000		10
--            0=light, 1=dark!

	midx:=0;
	WHILE (x>=100) LOOP
	    x   :=x-100;
	    midx:=midx+1;
		WAIT UNTIL clk = '1';
		EXIT RESET_LOOP WHEN reset = '1';
    END LOOP;
	x100:=midx;

	WAIT UNTIL clk = '1' ;

	midx:=0;
	WHILE (x>=10) LOOP
	    x   :=x-10;
		midx:=midx+1;
		WAIT UNTIL clk = '1';
		EXIT RESET_LOOP WHEN reset = '1';
    END LOOP;
	x10:=midx;

	x1:=x;

--####   litgh=1, dark=0 ####--
    CASE x100 IS
        WHEN 0 => unit3 <= "1000000";
        WHEN 1 => unit3 <= "1111001";
        WHEN 2 => unit3 <= "0100100";
        WHEN 3 => unit3 <= "0110000";
        WHEN 4 => unit3 <= "0011001";
        WHEN 5 => unit3 <= "0010010";
        WHEN 6 => unit3 <= "0000010";
        WHEN 7 => unit3 <= "1111000";
        WHEN 8 => unit3 <= "0000000";
        WHEN 9 => unit3 <= "0010000";
        WHEN others => unit3 <= "1111111";
    END CASE;

    CASE x10 IS
        WHEN 0 => unit2 <= "1000000";
        WHEN 1 => unit2 <= "1111001";
        WHEN 2 => unit2 <= "0100100";
        WHEN 3 => unit2 <= "0110000";
        WHEN 4 => unit2 <= "0011001";
        WHEN 5 => unit2 <= "0010010";
        WHEN 6 => unit2 <= "0000010";
        WHEN 7 => unit2 <= "1111000";
        WHEN 8 => unit2 <= "0000000";
        WHEN 9 => unit2 <= "0010000";
        WHEN others => unit2 <= "1111111";

    END CASE;

    CASE x1 IS
        WHEN 0 => unit1 <= "1000000";
        WHEN 1 => unit1 <= "1111001";
        WHEN 2 => unit1 <= "0100100";
        WHEN 3 => unit1 <= "0110000";
        WHEN 4 => unit1 <= "0011001";
        WHEN 5 => unit1 <= "0010010";
        WHEN 6 => unit1 <= "0000010";
        WHEN 7 => unit1 <= "1111000";
        WHEN 8 => unit1 <= "0000000";
        WHEN 9 => unit1 <= "0010000";
        WHEN others => unit1 <= "1111111";
    END CASE;

	midx := 0;
    rdy <= '1';   
  END LOOP RESET_LOOP;

  END PROCESS gcd;
END algorithm;