📄 data_pro.rpt
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-- Equation name is '_LC8_B14', type is buried
_LC8_B14 = LCELL( _EQ014);
_EQ014 = _LC3_B18 & !_LC6_B13 & !_LC7_B13
# beichu22 & _LC6_B13;
-- Node name is ':552'
-- Equation name is '_LC5_B14', type is buried
_LC5_B14 = LCELL( _EQ015);
_EQ015 = !_LC2_B13 & !_LC4_B13 & _LC8_B14
# _LC2_B13 & Numf22;
-- Node name is ':561'
-- Equation name is '_LC4_B18', type is buried
_LC4_B18 = LCELL( _EQ016);
_EQ016 = !_LC1_B13 & _LC7_B20 & !_LC8_B13
# chu21 & _LC8_B13;
-- Node name is ':567'
-- Equation name is '_LC6_B20', type is buried
_LC6_B20 = LCELL( _EQ017);
_EQ017 = _LC4_B18 & !_LC6_B13 & !_LC7_B13
# beichu21 & _LC6_B13;
-- Node name is ':573'
-- Equation name is '_LC7_B20', type is buried
_LC7_B20 = LCELL( _EQ018);
_EQ018 = !_LC2_B13 & !_LC4_B13 & _LC6_B20
# _LC2_B13 & Numf21;
-- Node name is ':582'
-- Equation name is '_LC5_B18', type is buried
_LC5_B18 = LCELL( _EQ019);
_EQ019 = !_LC1_B13 & _LC1_B18 & !_LC8_B13
# chu20 & _LC8_B13;
-- Node name is ':588'
-- Equation name is '_LC6_B18', type is buried
_LC6_B18 = LCELL( _EQ020);
_EQ020 = _LC5_B18 & !_LC6_B13 & !_LC7_B13
# beichu20 & _LC6_B13;
-- Node name is ':594'
-- Equation name is '_LC1_B18', type is buried
_LC1_B18 = LCELL( _EQ021);
_EQ021 = !_LC2_B13 & !_LC4_B13 & _LC6_B18
# _LC2_B13 & Numf20;
-- Node name is ':600'
-- Equation name is '_LC2_B15', type is buried
_LC2_B15 = LCELL( _EQ022);
_EQ022 = !_LC1_B13 & _LC1_B15
# chu33 & _LC1_B13;
-- Node name is ':603'
-- Equation name is '_LC4_B15', type is buried
_LC4_B15 = LCELL( _EQ023);
_EQ023 = _LC2_B15 & !_LC8_B13
# chu13 & _LC8_B13;
-- Node name is ':606'
-- Equation name is '_LC5_B15', type is buried
_LC5_B15 = LCELL( _EQ024);
_EQ024 = _LC4_B15 & !_LC7_B13
# beichu33 & _LC7_B13;
-- Node name is ':609'
-- Equation name is '_LC6_B15', type is buried
_LC6_B15 = LCELL( _EQ025);
_EQ025 = _LC5_B15 & !_LC6_B13
# beichu13 & _LC6_B13;
-- Node name is ':612'
-- Equation name is '_LC7_B15', type is buried
_LC7_B15 = LCELL( _EQ026);
_EQ026 = !_LC4_B13 & _LC6_B15
# _LC4_B13 & Numf33;
-- Node name is ':615'
-- Equation name is '_LC1_B15', type is buried
_LC1_B15 = LCELL( _EQ027);
_EQ027 = !_LC2_B13 & _LC7_B15
# _LC2_B13 & Numf13;
-- Node name is ':621'
-- Equation name is '_LC1_B20', type is buried
_LC1_B20 = LCELL( _EQ028);
_EQ028 = !_LC1_B13 & _LC8_B20
# chu32 & _LC1_B13;
-- Node name is ':624'
-- Equation name is '_LC2_B20', type is buried
_LC2_B20 = LCELL( _EQ029);
_EQ029 = _LC1_B20 & !_LC8_B13
# chu12 & _LC8_B13;
-- Node name is ':627'
-- Equation name is '_LC3_B20', type is buried
_LC3_B20 = LCELL( _EQ030);
_EQ030 = _LC2_B20 & !_LC7_B13
# beichu32 & _LC7_B13;
-- Node name is ':630'
-- Equation name is '_LC4_B20', type is buried
_LC4_B20 = LCELL( _EQ031);
_EQ031 = _LC3_B20 & !_LC6_B13
# beichu12 & _LC6_B13;
-- Node name is ':633'
-- Equation name is '_LC5_B20', type is buried
_LC5_B20 = LCELL( _EQ032);
_EQ032 = !_LC4_B13 & _LC4_B20
# _LC4_B13 & Numf32;
-- Node name is ':636'
-- Equation name is '_LC8_B20', type is buried
_LC8_B20 = LCELL( _EQ033);
_EQ033 = !_LC2_B13 & _LC5_B20
# _LC2_B13 & Numf12;
-- Node name is ':642'
-- Equation name is '_LC1_B14', type is buried
_LC1_B14 = LCELL( _EQ034);
_EQ034 = !_LC1_B13 & _LC2_B14
# chu31 & _LC1_B13;
-- Node name is ':645'
-- Equation name is '_LC3_B14', type is buried
_LC3_B14 = LCELL( _EQ035);
_EQ035 = _LC1_B14 & !_LC8_B13
# chu11 & _LC8_B13;
-- Node name is ':648'
-- Equation name is '_LC4_B14', type is buried
_LC4_B14 = LCELL( _EQ036);
_EQ036 = _LC3_B14 & !_LC7_B13
# beichu31 & _LC7_B13;
-- Node name is ':651'
-- Equation name is '_LC6_B14', type is buried
_LC6_B14 = LCELL( _EQ037);
_EQ037 = _LC4_B14 & !_LC6_B13
# beichu11 & _LC6_B13;
-- Node name is ':654'
-- Equation name is '_LC7_B14', type is buried
_LC7_B14 = LCELL( _EQ038);
_EQ038 = !_LC4_B13 & _LC6_B14
# _LC4_B13 & Numf31;
-- Node name is ':657'
-- Equation name is '_LC2_B14', type is buried
_LC2_B14 = LCELL( _EQ039);
_EQ039 = !_LC2_B13 & _LC7_B14
# _LC2_B13 & Numf11;
-- Node name is ':663'
-- Equation name is '_LC1_B17', type is buried
_LC1_B17 = LCELL( _EQ040);
_EQ040 = !_LC1_B13 & _LC7_B17
# chu30 & _LC1_B13;
-- Node name is ':666'
-- Equation name is '_LC2_B17', type is buried
_LC2_B17 = LCELL( _EQ041);
_EQ041 = _LC1_B17 & !_LC8_B13
# chu10 & _LC8_B13;
-- Node name is ':669'
-- Equation name is '_LC3_B17', type is buried
_LC3_B17 = LCELL( _EQ042);
_EQ042 = _LC2_B17 & !_LC7_B13
# beichu30 & _LC7_B13;
-- Node name is ':672'
-- Equation name is '_LC4_B17', type is buried
_LC4_B17 = LCELL( _EQ043);
_EQ043 = _LC3_B17 & !_LC6_B13
# beichu10 & _LC6_B13;
-- Node name is ':675'
-- Equation name is '_LC5_B17', type is buried
_LC5_B17 = LCELL( _EQ044);
_EQ044 = !_LC4_B13 & _LC4_B17
# _LC4_B13 & Numf30;
-- Node name is ':678'
-- Equation name is '_LC7_B17', type is buried
_LC7_B17 = LCELL( _EQ045);
_EQ045 = !_LC2_B13 & _LC5_B17
# _LC2_B13 & Numf10;
Project Information d:\vhdl\vhd\data_pro.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'FLEX10K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:01
Partitioner 00:00:00
Fitter 00:00:03
Timing SNF Extractor 00:00:00
Assembler 00:00:01
-------------------------- --------
Total Time 00:00:05
Memory Allocated
-----------------
Peak memory allocated during compilation = 13,913K
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