comparetor_magnitude.txt

红绿灯的控制

-- Magnitude Comparator
-- VHDL description of a 4-bit magnitude comparator with expansion inputs
-- first architecture demonstrates use of relational operators on 
-- bit vectors (=,>,<).Second architecture shows sequential behaviour description.
-- Both descriptions do not fully model behaviour of real device for all possible combinations of inputs.
-- download from: www.pld.com.cn & www.fpga.com.cn

LIBRARY ieee;
USE ieee.std_logic_1164.ALL;

ENTITY mag4comp IS
   GENERIC(eqdel,gtdel,ltdel : TIME := 10 ns);    --output delay parameters
   PORT(a,b : IN BIT_VECTOR(3 DOWNTO 0);          --input words, DOWNTO ordering needed for comparison operators
         aeqbin,agtbin,altbin : IN BIT;           --expansion inputs
         aeqbout,agtbout,altbout : OUT BIT);      --outputs
END mag4comp;

ARCHITECTURE dataflow OF mag4comp IS
--this architecture assumes that only one of the expansion inputs
--is active at any time,if more than one expansion input is active,
--more than one output may be active.
BEGIN
   aeqbout <= '1' AFTER eqdel WHEN ((a = b) AND (aeqbin = '1'))
               ELSE '0' AFTER eqdel;
   agtbout <= '1' AFTER gtdel WHEN ((a > b) OR ((a = b) AND (agtbin = '1')))
               ELSE '0' AFTER gtdel;
   altbout <= '1' AFTER ltdel WHEN ((a < b) OR ((a = b) AND (altbin = '1')))
               ELSE '0' AFTER ltdel;
END dataflow;

ARCHITECTURE behaviour OF mag4comp IS
BEGIN
   PROCESS(a,b,aeqbin,agtbin,altbin)
   BEGIN
      IF (a > b) THEN 
         agtbout <= '1' AFTER gtdel;
         aeqbout <= '0' AFTER eqdel;
         altbout <= '0' AFTER ltdel;
      ELSIF (a < b) THEN 
         altbout <= '1' AFTER ltdel;
         aeqbout <= '0' AFTER eqdel;
         agtbout <= '0' AFTER gtdel;
      ELSE --a=b,expansion inputs have priority ordering 
         IF (aeqbin = '1') THEN 
            aeqbout <= '1' AFTER eqdel;
            agtbout <= '0' AFTER gtdel;
            altbout <= '0' AFTER ltdel;
         ELSIF (agtbin = '1') THEN
            agtbout <= '1' AFTER gtdel;
            altbout <= '0' AFTER ltdel;
            aeqbout <= '0' AFTER eqdel;
         ELSIF (altbin = '1') THEN
            agtbout <= '0' AFTER gtdel;
            altbout <= '1' AFTER ltdel;
            aeqbout <= '0' AFTER eqdel;
         ELSE
            agtbout <= '0' AFTER gtdel;
            altbout <= '0' AFTER ltdel;
            aeqbout <= '0' AFTER eqdel;
         END IF;
      END IF;
   END PROCESS;
END behaviour;