traffic_light.rpt

Traffic light written with Verilog

Project Informationc:\documents and settings\no7\my documents\traffic light\traffic_light.rpt

MAX+plus II Compiler Report File
Version 10.0 9/14/2000
Compiled: 03/18/2004 23:37:27

Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input Output Bidir  Memory  Memory  			 LCs
POF       Device          Pins  Pins   Pins   Bits % Utilized  LCs  % Utilized

traffic_light
      EP1K100FC484-3       11     24     0    0         0  %    370      7  %

User Pins:                 11     24     0  



Project Informationc:\documents and settings\no7\my documents\traffic light\traffic_light.rpt

** PROJECT COMPILATION MESSAGES **

Warning: Flipflop ':2342' stuck at GND
Warning: Flipflop '|SetTime:set_display|:2868' stuck at GND


** PROJECT TIMING MESSAGES **

Warning: Timing characteristics of device EP1K100FC484-3 are preliminary


Project Informationc:\documents and settings\no7\my documents\traffic light\traffic_light.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

traffic_light@A16                 buttom
traffic_light@H11                 clock
traffic_light@V9                  display_time0
traffic_light@V8                  display_time1
traffic_light@Y9                  display_time2
traffic_light@U9                  display_time3
traffic_light@AB8                 display_time4
traffic_light@AA8                 display_time5
traffic_light@W8                  display_time6
traffic_light@W9                  display_time7
traffic_light@B19                 Ecar0
traffic_light@C22                 Ecar1
traffic_light@A17                 Ecar2
traffic_light@E17                 Eman0
traffic_light@F16                 Eman2
traffic_light@V6                  en_sw
traffic_light@A19                 Ncar0
traffic_light@C18                 Ncar1
traffic_light@B18                 Ncar2
traffic_light@E16                 Nman0
traffic_light@C16                 Nman2
traffic_light@AA9                 scan0
traffic_light@AB9                 scan1
traffic_light@U10                 scan2
traffic_light@V10                 scan3
traffic_light@Y7                  switches0
traffic_light@AA7                 switches1
traffic_light@W7                  switches2
traffic_light@U8                  switches3
traffic_light@V7                  switches4
traffic_light@Y4                  switches5
traffic_light@AB6                 switches6
traffic_light@Y6                  switches7


Project Informationc:\documents and settings\no7\my documents\traffic light\traffic_light.rpt

** FILE HIERARCHY **



|switch:switch1|
|settime:set_display|
|settime:set_display|lpm_add_sub:2901|
|settime:set_display|lpm_add_sub:2901|addcore:adder|
|settime:set_display|lpm_add_sub:2901|altshift:result_ext_latency_ffs|
|settime:set_display|lpm_add_sub:2901|altshift:carry_ext_latency_ffs|
|settime:set_display|lpm_add_sub:2901|altshift:oflow_ext_latency_ffs|
|counter:count|
|counter:count|lpm_add_sub:172|
|counter:count|lpm_add_sub:172|addcore:adder|
|counter:count|lpm_add_sub:172|altshift:result_ext_latency_ffs|
|counter:count|lpm_add_sub:172|altshift:carry_ext_latency_ffs|
|counter:count|lpm_add_sub:172|altshift:oflow_ext_latency_ffs|
|counter:count|adder:adder1|
|counter:count|adder:adder1|lpm_add_sub:73|
|counter:count|adder:adder1|lpm_add_sub:73|addcore:adder|
|counter:count|adder:adder1|lpm_add_sub:73|altshift:result_ext_latency_ffs|
|counter:count|adder:adder1|lpm_add_sub:73|altshift:carry_ext_latency_ffs|
|counter:count|adder:adder1|lpm_add_sub:73|altshift:oflow_ext_latency_ffs|
|adderes:added|
|adderes:added|lpm_add_sub:73|
|adderes:added|lpm_add_sub:73|addcore:adder|
|adderes:added|lpm_add_sub:73|altshift:result_ext_latency_ffs|
|adderes:added|lpm_add_sub:73|altshift:carry_ext_latency_ffs|
|adderes:added|lpm_add_sub:73|altshift:oflow_ext_latency_ffs|


Device-Specific Information:c:\documents and settings\no7\my documents\traffic light\traffic_light.rpt
traffic_light

***** Logic for device 'traffic_light' compiled without errors.




Device: EP1K100FC484-3

ACEX 1K Configuration Scheme: Passive Serial

Device Options:
    User-Supplied Start-Up Clock               = OFF
    Auto-Restart Configuration on Frame Error  = OFF
    Release Clears Before Tri-States           = OFF
    Enable Chip_Wide Reset                     = OFF
    Enable Chip-Wide Output Enable             = OFF
    Enable INIT_DONE Output                    = OFF
    JTAG User Code                             = 7f
    MultiVolt I/O                              = OFF




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