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📄 display.rpt

📁 Traffic light written with Verilog
💻 RPT
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                                     Logic cells placed in LAB 'E'
        +--------------------------- LC67 display_time0
        | +------------------------- LC73 display_time1
        | | +----------------------- LC69 display_time2
        | | | +--------------------- LC80 d_scan0
        | | | | +------------------- LC77 d_scan1
        | | | | | +----------------- LC75 d_scan2
        | | | | | | +--------------- LC72 d_scan3
        | | | | | | | +------------- LC65 d_round1
        | | | | | | | | +----------- LC66 d_round0
        | | | | | | | | | +--------- LC78 ~2710~1
        | | | | | | | | | | +------- LC70 ~2710~3
        | | | | | | | | | | | +----- LC74 ~2712~5
        | | | | | | | | | | | | +--- LC76 ~2713~1
        | | | | | | | | | | | | | +- LC68 ~2713~4
        | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | |   that feed LAB 'E'
LC      | | | | | | | | | | | | | | | A B C D E F |     Logic cells that feed LAB 'E':
LC65 -> - * * * * * * * - * * * * * | - * * * * * | <-- d_round1
LC66 -> - * * * * * * * * * * * * * | - * * * * * | <-- d_round0
LC76 -> - - * - - - - - - - - - - - | - - - - * - | <-- ~2713~1
LC68 -> - - * - - - - - - - - - - - | - - * - * - | <-- ~2713~4

Pin
67   -> - - - - - - - - - - - - - - | - - - - - - | <-- d_clk
5    -> - * * - - - - - - - - - - - | - * * * * * | <-- d_no_count
9    -> - * * - - - - - - * * * * - | - * * * * * | <-- d_second1
10   -> - * * - - - - - - * * * * * | - * * * * * | <-- d_second2
12   -> - * * - - - - - - * * * * * | - * * * * * | <-- d_second3
13   -> - * * - - - - - - * * * * * | - * * * * * | <-- d_second4
4    -> - * * - - - - - - * * * * * | - * * * * * | <-- d_second5
8    -> - * * - - - - - - * * * * * | - * * * * * | <-- d_second6
7    -> - * * - - - - - - * * * * * | - * * * * * | <-- d_second7
14   -> - * * - - - - - - - - - - - | - * - * * * | <-- d_setsec0
15   -> - * * - - - - - - - - - - - | - * - * * * | <-- d_setsec1
33   -> - * * - - - - - - - - - - - | - * - * * * | <-- d_setsec3
32   -> - * * - - - - - - - - - - - | - * * * * * | <-- d_setsec4
22   -> - * * - - - - - - - - - - - | - * * * * * | <-- d_setsec5
18   -> - * - - - - - - - - - - - - | - * * * * * | <-- d_setsec6
20   -> - * * - - - - - - - - - - - | - * * * * * | <-- d_setsec7
19   -> - * * - - - - - - * * * * * | - * * * * * | <-- no_display
LC47 -> - - * - - - - - - - - - - - | - - - - * - | <-- ~2713~2
LC45 -> - - * - - - - - - - - - - - | - - - - * - | <-- ~2713~3
LC81 -> - - * - - - - - - - - - - - | - - - * * - | <-- ~2713~5
LC90 -> - - * - - - - - - - - - - - | - - - - * - | <-- ~2713~6
LC82 -> - * - - - - - - - - - - - - | - * - - * - | <-- ~2714~1
LC19 -> - * - - - - - - - - - - - - | - - - - * - | <-- ~2714~2
LC89 -> - * - - - - - - - - - - - - | - - - - * - | <-- ~2714~3
LC88 -> - * - - - - - - - - - - - - | - - - - * - | <-- ~2714~4
LC87 -> - * - - - - - - - - - - - - | - - - - * - | <-- ~2714~5
LC34 -> - * - - - - - - - - - - - - | - - - - * - | <-- ~2714~6
LC48 -> - * - - - - - - - - - - - - | - - - - * - | <-- ~2714~7
LC83 -> - * - - - - - - - - - - - - | - - - - * - | <-- ~2714~8
LC84 -> - * * - - - - - - - - - - - | - * * - * - | <-- ~2714~9


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:c:\documents and settings\no7\my documents\traffic light\display.rpt
display

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'F':

                                         Logic cells placed in LAB 'F'
        +------------------------------- LC86 display_time3
        | +----------------------------- LC91 ~2708~5
        | | +--------------------------- LC93 ~2709~6
        | | | +------------------------- LC95 ~2710~4
        | | | | +----------------------- LC92 ~2711~1
        | | | | | +--------------------- LC94 ~2711~2
        | | | | | | +------------------- LC85 ~2711~6
        | | | | | | | +----------------- LC96 ~2711~7
        | | | | | | | | +--------------- LC81 ~2713~5
        | | | | | | | | | +------------- LC90 ~2713~6
        | | | | | | | | | | +----------- LC82 ~2714~1
        | | | | | | | | | | | +--------- LC89 ~2714~3
        | | | | | | | | | | | | +------- LC88 ~2714~4
        | | | | | | | | | | | | | +----- LC87 ~2714~5
        | | | | | | | | | | | | | | +--- LC83 ~2714~8
        | | | | | | | | | | | | | | | +- LC84 ~2714~9
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'F'
LC      | | | | | | | | | | | | | | | | | A B C D E F |     Logic cells that feed LAB 'F':

Pin
67   -> - - - - - - - - - - - - - - - - | - - - - - - | <-- d_clk
5    -> * * * * * * * * * - * * * - * * | - * * * * * | <-- d_no_count
17   -> * - * * * * * - - * - * - * - - | - * * * - * | <-- d_second0
9    -> - * - - * * * - - * * * - * * - | - * * * * * | <-- d_second1
10   -> * * * - * * - * * - * * * * - - | - * * * * * | <-- d_second2
12   -> * * * - * * * * * * * * * * * - | - * * * * * | <-- d_second3
13   -> * * * * * * * * * * * * * * * - | - * * * * * | <-- d_second4
4    -> * * * * * * * - - * * * * * * - | - * * * * * | <-- d_second5
8    -> * * * * * * * * * * * * * * - - | - * * * * * | <-- d_second6
7    -> * * * * * * * * * * * * * * * - | - * * * * * | <-- d_second7
14   -> * * * * * - * - - - - * * - - - | - * - * * * | <-- d_setsec0
15   -> * * * - - - * - - - * * * - * * | - * - * * * | <-- d_setsec1
30   -> * * - - * - * - * - * * * - * * | - - - * - * | <-- d_setsec2
33   -> * * * * * - * - * - * * * - * * | - * - * * * | <-- d_setsec3
32   -> * * * * - * - * - - - * * - - - | - * * * * * | <-- d_setsec4
22   -> * - * - - * - * - - - * * - * * | - * * * * * | <-- d_setsec5
18   -> * * - - - * - * * - - * * - * * | - * * * * * | <-- d_setsec6
20   -> * * * * - * - * * - - * * - * * | - * * * * * | <-- d_setsec7
19   -> * * * * * * * * * * * * * * * - | - * * * * * | <-- no_display
LC65 -> * * * * * * * * * * * * * * * * | - * * * * * | <-- d_round1
LC66 -> * * * * * * * * * * * * - - * * | - * * * * * | <-- d_round0
LC49 -> * - - - - - - - - - - - - - - - | - * - - - * | <-- ~2712~1
LC54 -> * - - - - - - - - - - - - - - - | - - - - - * | <-- ~2712~2
LC50 -> * - - - - - - - - - - - - - - - | - - - - - * | <-- ~2712~3
LC44 -> * - - - - - - - - - - - - - - - | - - - - - * | <-- ~2712~4
LC74 -> * - - - - - - - - - - - - - - - | - - - - - * | <-- ~2712~5


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:c:\documents and settings\no7\my documents\traffic light\display.rpt
display

** EQUATIONS **

d_clk    : INPUT;
d_no_count : INPUT;
d_second0 : INPUT;
d_second1 : INPUT;
d_second2 : INPUT;
d_second3 : INPUT;
d_second4 : INPUT;
d_second5 : INPUT;
d_second6 : INPUT;
d_second7 : INPUT;
d_setsec0 : INPUT;
d_setsec1 : INPUT;
d_setsec2 : INPUT;
d_setsec3 : INPUT;
d_setsec4 : INPUT;
d_setsec5 : INPUT;
d_setsec6 : INPUT;
d_setsec7 : INPUT;
no_display : INPUT;

-- Node name is 'display_time0' 
-- Equation name is 'display_time0', location is LC067, type is output.
 display_time0 = LCELL( GND $  GND);

-- Node name is 'display_time1' = ':2722' 
-- Equation name is 'display_time1', type is output 
 display_time1 = DFFE( _EQ001 $  VCC, GLOBAL( d_clk),  VCC,  VCC,  VCC);
  _EQ001 = !_LC019 & !_LC034 & !_LC048 & !_LC082 & !_LC083 & !_LC084 & 
             !_LC087 & !_LC088 & !_LC089 &  _X001 &  _X002 &  _X003 &  _X004 & 
              _X005 &  _X006 &  _X007;
  _X001  = EXP(!d_round0 & !d_round1 &  d_second3 &  d_second4 & !d_second5 & 
             !d_second7 & !no_display);
  _X002  = EXP( d_no_count & !d_round0 &  d_round1 & !d_setsec4 &  d_setsec5 & 
             !d_setsec7);
  _X003  = EXP(!d_round0 & !d_round1 & !d_second2 & !d_second3 & !d_second4 & 
              d_second5 & !d_second7 & !no_display);
  _X004  = EXP(!d_round0 & !d_round1 &  d_second5 & !d_second6 & !d_second7 & 
             !no_display);
  _X005  = EXP( d_no_count &  d_round0 &  d_round1 & !d_setsec0 &  d_setsec1 & 
             !d_setsec3);
  _X006  = EXP( d_no_count & !d_round0 &  d_round1 &  d_setsec5 & !d_setsec6 & 
             !d_setsec7);
  _X007  = EXP(!d_round1 & !d_second1 &  d_second2 & !d_second3 & !d_second5 & 
              d_second6 & !d_second7 & !no_display);

-- Node name is 'display_time2' = ':2721' 
-- Equation name is 'display_time2', type is output 
 display_time2 = DFFE( _EQ002 $  VCC, GLOBAL( d_clk),  VCC,  VCC,  VCC);
  _EQ002 = !_LC045 & !_LC047 & !_LC068 & !_LC076 & !_LC081 & !_LC084 & 
             !_LC090 &  _X007 &  _X008 &  _X009 &  _X010 &  _X011;
  _X007  = EXP(!d_round1 & !d_second1 &  d_second2 & !d_second3 & !d_second5 & 
              d_second6 & !d_second7 & !no_display);
  _X008  = EXP(!d_round0 & !d_round1 & !d_second5 &  d_second6 & !d_second7 & 
             !no_display);
  _X009  = EXP( d_no_count &  d_round0 &  d_round1 & !d_setsec0 & !d_setsec1 & 
             !d_setsec3);
  _X010  = EXP( d_no_count & !d_round0 &  d_round1 & !d_setsec4 & !d_setsec5 & 
             !d_setsec7);
  _X011  = EXP(!d_round1 & !d_second1 & !d_second2 &  d_second3 & !d_second4 & 
             !d_second5 & !d_second6 & !d_second7 & !no_display);

-- Node name is 'display_time3' = ':2720' 
-- Equation name is 'display_time3', type is output 
 display_time3 = DFFE( _EQ003 $  VCC, GLOBAL( d_clk),  VCC,  VCC,  VCC);
  _EQ003 = !_LC044 & !_LC049 & !_LC050 & !_LC054 & !_LC074 &  _X002 &  _X005 & 
              _X012 &  _X013 &  _X014 &  _X015;
  _X002  = EXP( d_no_count & !d_round0 &  d_round1 & !d_setsec4 &  d_setsec5 & 
             !d_setsec7);
  _X005  = EXP( d_no_count &  d_round0 &  d_round1 & !d_setsec0 &  d_setsec1 & 
             !d_setsec3);
  _X012  = EXP( d_round0 & !d_round1 & !d_second0 & !d_second2 & !d_second3 & 
              d_second4 & !d_second6 & !d_second7 & !no_display);
  _X013  = EXP( d_no_count & !d_round0 &  d_round1 & !d_setsec4 & !d_setsec5 & 
             !d_setsec6);
  _X014  = EXP( d_round0 & !d_round1 & !d_second0 & !d_second2 & !d_second4 & 
             !d_second5 & !d_second6 & !d_second7 & !no_display);
  _X015  = EXP( d_no_count &  d_round0 &  d_round1 & !d_setsec0 & !d_setsec1 & 
             !d_setsec2);

-- Node name is 'display_time4' = ':2719' 
-- Equation name is 'display_time4', type is output 
 display_time4 = DFFE( _EQ004 $  VCC, GLOBAL( d_clk),  VCC,  VCC,  VCC);
  _EQ004 = !_LC042 & !_LC049 & !_LC056 & !_LC059 & !_LC082 & !_LC084 & 
             !_LC085 & !_LC092 & !_LC094 & !_LC096 &  _X001 &  _X002 &  _X005 & 
              _X006 &  _X011 &  _X012 &  _X014 &  _X016 &  _X017;
  _X001  = EXP(!d_round0 & !d_round1 &  d_second3 &  d_second4 & !d_second5 & 
             !d_second7 & !no_display);
  _X002  = EXP( d_no_count & !d_round0 &  d_round1 & !d_setsec4 &  d_setsec5 & 
             !d_setsec7);
  _X005  = EXP( d_no_count &  d_round0 &  d_round1 & !d_setsec0 &  d_setsec1 & 
             !d_setsec3);
  _X006  = EXP( d_no_count & !d_round0 &  d_round1 &  d_setsec5 & !d_setsec6 & 
             !d_setsec7);
  _X011  = EXP(!d_round1 & !d_second1 & !d_second2 &  d_second3 & !d_second4 & 
             !d_second5 & !d_second6 & !d_second7 & !no_display);
  _X012  = EXP( d_round0 & !d_round1 & !d_second0 & !d_second2 & !d_second3 & 
              d_second4 & !d_second6 & !d_second7 & !no_display);
  _X014  = EXP( d_round0 & !d_round1 & !d_second0 & !d_second2 & !d_second4 & 
             !d_second5 & !d_second6 & !d_second7 & !no_display);
  _X016  = EXP( d_no_count & !d_round0 &  d_round1 & !d_setsec4 & !d_setsec6 & 
             !d_setsec7);
  _X017  = EXP(!d_round1 &  d_second1 & !d_second2 & !d_second3 & !d_second4 & 
              d_second5 &  d_second6 & !d_second7 & !no_display);

-- Node name is 'display_time5' = ':2718' 
-- Equation name is 'display_time5', type is output 
 display_time5 = DFFE( _EQ005 $  VCC, GLOBAL( d_clk),  VCC,  VCC,  VCC);
  _EQ005 = !_LC022 & !_LC070 & !_LC078 & !_LC081 & !_LC095 &  _X004 &  _X008 & 
              _X018 &  _X019;
  _X004  = EXP(!d_round0 & !d_round1 &  d_second5 & !d_second6 & !d_second7 & 
             !no_display);
  _X008  = EXP(!d_round0 & !d_round1 & !d_second5 &  d_second6 & !d_second7 & 
             !no_display);
  _X018  = EXP( d_no_count &  d_round0 &  d_round1 & !d_setsec1 & !d_setsec2);
  _X019  = EXP( d_no_count & !d_round0 &  d_round1 & !d_setsec5 & !d_setsec6);

-- Node name is 'display_time6' = ':2717' 
-- Equation name is 'display_time6', type is output 
 display_time6 = DFFE( _EQ006 $  VCC, GLOBAL( d_clk),  VCC,  VCC,  VCC);
  _EQ006 = !_LC035 & !_LC037 & !_LC046 & !_LC052 & !_LC057 & !_LC060 & 
             !_LC093 &  _X003 &  _X009 &  _X010 &  _X017 &  _X018 &  _X019 & 
              _X020;
  _X003  = EXP(!d_round0 & !d_round1 & !d_second2 & !d_second3 & !d_second4 & 

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