tblib.vhd

来自「一个航天航空用的Sparc处理器（配美国欧洲宇航局用的R_tems嵌入式操作系统」· VHDL 代码 · 共 49 行

-----------------------------------------------------------------------------
--  This file is a part of the LEON VHDL model
--  Copyright (C) 1999  European Space Agency (ESA)
--
--  This program is free software; you can redistribute it and/or modify
--  it under the terms of the GNU General Public License as published by
--  the Free Software Foundation; either version 2 of the License, or
--  (at your option) any later version.
--
--  See the file COPYING for the full details of the license.
-----------------------------------------------------------------------------   
-- Package:     debug
-- File:        debug.vhd
-- Author:      Jiri Gaisler - ESA/ESTEC
-- Description: Package with component declaration of tbgen.
------------------------------------------------------------------------------  
-- Version control:
-- 11-09-1998:  : First implemetation
-- 26-09-1999:  : Release 1.0
------------------------------------------------------------------------------  

LIBRARY ieee;
use IEEE.std_logic_1164.all;
use work.iface.all; 

package tblib is

component tbgen
  generic (
    msg1      : string := "8 kbyte 32-bit rom, 0-ws, EDAC";
    msg2      : string := "2x32 kbyte 32-bit ram, 0-ws, EDAC";
    DISASS    : boolean := false;	-- enable disassembly to stdout
    clkperiod : integer := 20;		-- system clock period
    romfile   : string := "tsource/rome.dat";  -- rom contents
    ramfile   : string := "tsource/ram.dat";  -- ram contents
    romwidth  : integer := 32;		-- rom data width
    romdepth  : integer := 11;		-- rom address depth
    romedac   : boolean := true;	-- rom EDAC enable
    romtacc   : integer := 10;		-- rom access time (ns)
    ramwidth  : integer := 32;		-- ram data width
    ramdepth  : integer := 14;		-- ram address depth
    rambanks  : integer := 2;		-- number of ram banks
    ramedac   : boolean := true;	-- ram EDAC enable
    ramtacc   : integer := 10		-- ram access time (ns)
  );
end component; 

end tblib;