macro.vhd

一个航天航空用的Sparc处理器（配美国欧洲宇航局用的R_tems嵌入式操作系统）的VHDL源代码

-----------------------------------------------------------------------------
--  This file is a part of the LEON VHDL model
--  Copyright (C) 1999  European Space Agency (ESA)
--
--  This program is free software; you can redistribute it and/or modify
--  it under the terms of the GNU General Public License as published by
--  the Free Software Foundation; either version 2 of the License, or
--  (at your option) any later version.
--
--  See the file COPYING for the full details of the license.
-----------------------------------------------------------------------------
-- Entity: 	macro
-- File:	macro.vhd
-- Author:	Jiri Gaisler - ESA/ESTEC
-- Description:	some common macro functions
------------------------------------------------------------------------------
-- Version control:
-- 29-11-1997:	First implemetation
-- 26-09-1999:	Release 1.0
------------------------------------------------------------------------------


library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
use work.iface.all;

package macro is

constant zero32 : std_Logic_vector(31 downto 0) := (others => '0');

function decode(v : std_logic_vector) return std_logic_vector;
function genmux(s,v : std_logic_vector) return std_logic;
function xorv(d : std_logic_vector) return std_logic;
function chkbitgen(d : std_logic_vector(31 downto 0)) return std_logic_vector;
function edaccorr(din   : std_logic_vector(31 downto 0); 
		  cbin  : std_logic_vector(6 downto 0);
		  synin : std_logic_vector(6 downto 0)) return edaccorrtype;

end;

package body macro is

-- generic decoder

function decode(v : std_logic_vector) return std_logic_vector is
variable res : std_logic_vector((2**v'length)-1 downto 0);
variable i : natural;
begin
  res := (others => '0');
-- pragma translate_off
  i := 0;
  if not is_x(v) then
-- pragma translate_on
    i := conv_integer(unsigned(v));
    res(i) := '1';
-- pragma translate_off
  else
    res := (others => 'X');
  end if;
-- pragma translate_on
  return(res);
end;

-- generic multiplexer

function genmux(s,v : std_logic_vector) return std_logic is
variable res : std_logic_vector(v'length-1 downto 0);
variable i : integer;
begin
  res := v;
-- pragma translate_off
  i := 0;
  if not is_x(s) then
-- pragma translate_on
    i := conv_integer(unsigned(s));
-- pragma translate_off
  else
    res := (others => 'X');
  end if;
-- pragma translate_on
  return(res(i));
end;

-- vector XOR

function xorv(d : std_logic_vector) return std_logic is
variable tmp : std_logic;
begin
  tmp := '0';
  for i in d'range loop
    tmp := tmp xor d(i);
  end loop;
  return(tmp);
end;

-- 32-bit EDAC checkbit generator

function chkbitgen(d : std_logic_vector(31 downto 0)) return std_logic_vector is
  variable cb : std_logic_vector(6 downto 0);
begin
    cb(0) := D(0) xor D(4) xor D(6) xor D(7) xor D(8) xor D(9) xor D(11) xor D(14)
          xor D(17) xor D(18) xor D(19) xor D(21) xor D(26) xor D(28) xor D(29)
          xor D(31);

    cb(1) := D(0) xor D(1) xor D(2) xor D(4) xor D(6) xor D(8) xor D(10) xor D(12)
          xor D(16) xor D(17) xor D(18) xor D(20) xor D(22) xor D(24) xor D(26)
          xor D(28);

    cb(2) := not (D(0) xor D(3) xor D(4) xor D(7) xor D(9) xor D(10) xor D(13) xor
          D(15) xor D(16) xor D(19) xor D(20) xor D(23) xor D(25) xor D(26)
          xor D(29) xor D(31));

    cb(3) := not (D(0) xor D(1) xor D(5) xor D(6) xor D(7) xor D(11) xor D(12) xor
          D(13) xor D(16) xor D(17) xor D(21) xor D(22) xor D(23) xor D(27) xor
          D(28) xor D(29));


    cb(4) := D(2) xor D(3) xor D(4) xor D(5) xor D(6) xor D(7) xor D(14) xor D(15)
          xor D(18) xor D(19) xor D(20) xor D(21) xor D(22) xor D(23) xor D(30)
          xor D(31);

    cb(5) := D(8) xor D(9) xor D(10) xor D(11) xor D(12) xor D(13) xor D(14) xor
          D(15) xor D(24) xor D(25) xor D(26) xor D(27) xor D(28) xor D(29) xor
          D(30) xor D(31);

    cb(6) := D(0) xor D(1) xor D(2) xor D(3) xor D(4) xor D(5) xor D(6) xor
          D(7) xor D(24) xor D(25) xor D(26) xor D(27) xor D(28) xor D(29) xor
          D(30) xor D(31);

    return(cb);
end;

-- 32-bit EDAC single bit correction logic

function edaccorr(din   : std_logic_vector(31 downto 0); 
		  cbin  : std_logic_vector(6 downto 0);
		  synin : std_logic_vector(6 downto 0)) return edaccorrtype is
  variable cb, syn : std_logic_vector(6 downto 0);
  variable d : std_logic_vector(31 downto 0);
  variable et : edaccorrtype;
begin
    et.error := '1'; et.merror := '0'; cb := cbin; d := din;
    syn := cbin xor synin; 
    case syn is
    when "0000000" => et.error := '0';   -- No errors
    when "1001111" => D(0) := not D(0);   -- Bit 0
    when "1001010" => D(1) := not D(1);
    when "1010010" => D(2) := not D(2);
    when "1010100" => D(3) := not D(3);
    when "1010111" => D(4) := not D(4);
    when "1011000" => D(5) := not D(5);
    when "1011011" => D(6) := not D(6);
    when "1011101" => D(7) := not D(7);
    when "0100011" => D(8) := not D(8);
    when "0100101" => D(9) := not D(9);
    when "0100110" => D(10) := not D(10);   -- Bit 10  
    when "0101001" => D(11) := not D(11);
    when "0101010" => D(12) := not D(12);
    when "0101100" => D(13) := not D(13);
    when "0110001" => D(14) := not D(14);
    when "0110100" => D(15) := not D(15);
    when "0001110" => D(16) := not D(16);
    when "0001011" => D(17) := not D(17);
    when "0010011" => D(18) := not D(18);
    when "0010101" => D(19) := not D(19);  
    when "0010110" => D(20) := not D(20);   -- Bit 20
    when "0011001" => D(21) := not D(21);
    when "0011010" => D(22) := not D(22);
    when "0011100" => D(23) := not D(23);
    when "1100010" => D(24) := not D(24);
    when "1100100" => D(25) := not D(25);
    when "1100111" => D(26) := not D(26);
    when "1101000" => D(27) := not D(27);
    when "1101011" => D(28) := not D(28);
    when "1101101" => D(29) := not D(29);
    when "1110000" => D(30) := not D(30);   -- Bit 30
    when "1110101" => D(31) := not D(31);
    when "0000001" => cb(0) := not cb(0);   --Cb 0
    when "0000010" => cb(1) := not cb(1);   --Cb 1
    when "0000100" => cb(2) := not cb(2);   --Cb 2
    when "0001000" => cb(3) := not cb(3);   --Cb 3
    when "0010000" => cb(4) := not cb(4);   --Cb 4
    when "0100000" => cb(5) := not cb(5);   --Cb 5
    when "1000000" => cb(6) := not cb(6);   --Cb 6
    when Others => et.merror := '1';
    end case;

    et.data := D;
    et.cb := cb;
    return(et);
end;

end;