test.vhd

4bit ALU 利用vhdl语言编写的4位ALU 开发环境是在windows下

library ieee;              -- Load the ieee 1164 library
use ieee.std_logic_1164.all;  -- Make the package 'visible'

use ieee.numeric_std.all;

entity alutest is
end alutest;

architecture stimulus of alutest is

	signal a, b : std_logic_vector(3 downto 0) := "0000";
	signal s : std_logic_vector(3 downto 0) := "0000";
	signal cin : std_logic := '0';
	signal cout : std_logic;
   signal f : std_logic_vector(3 downto 0);
   
   component alu 
	port(
	       a, b : in std_logic_vector(3 downto 0);
	       s : in std_logic_vector(3 downto 0);
	       cin : in std_logic;
	       cout : out std_logic;
               f : out std_logic_vector(3 downto 0)
		   );
	   end component;
	   for all : alu use entity work.alu ;
	
begin
CUT: alu port map (a=>a,b=>b,s=>s,cin=>cin,cout=>cout,f=>f);
    process
    begin
    a <= "0010","1101" after 100 ns,"1010" after 200 ns,"1101" after 400 ns,"1011" after 600 ns,"1101" after 800 ns,"0001" after 1000 ns,"1001" after 1200 ns,"0001" after 1400 ns,"0100" after 1600 ns;
    b <= "0100","1011" after 200 ns,"1001" after 400 ns,"1001" after 600 ns,"1011" after 800 ns,"0101" after 1000 ns,"1001" after 1200 ns,"1110" after 1400 ns,"1101" after 1600 ns;
    s <= "1000","0111" after 200 ns,"0110" after 400 ns,"0101" after 600 ns,"0100" after 800 ns,"0011" after 1000 ns,"0010" after 1200 ns,"0001" after 1400 ns,"0000" after 1600 ns;
    cin <= '0','1' after 100 ns,'0' after 200 ns,'1' after 300 ns,'0' after 1400 ns,'1' after 1500 ns,'0' after 1600 ns,'1' after 1700 ns,'0' after 1800 ns;
    wait;
end process;       
end architecture stimulus;