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AX51 MACRO ASSEMBLER  XBANKING                                                              30/09/04 14:28:54 PAGE     1


MACRO ASSEMBLER AX51 V2.03a
OBJECT MODULE PLACED IN XBANKING.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\AX51.EXE XBANKING.A51 SET(SMALL) DEBUG EP

LOC    OBJ             LINE     SOURCE

                          1     $nomod51  NOLINES
                          2     $nocond 
                          3     ;------------------------------------------------------------------------------
                          4     ;  This file is part of the LX51 Extended Linker/Locater package
                          5     ;  Copyright (c) 2000 - 2001 Keil Elektronik GmbH and Keil Software, Inc.
                          6     ;  Version 1.03, Variable Banking: 'far' & 'far const' C51 memory type support
                          7     ;------------------------------------------------------------------------------
                          8     ;
                          9     ;************************ Configuration Section *******************************
                         10     ;                                                                             *
                         11     ; If the CPU provides an extended DPTR register for addressing HDATA, the     *
                         12     ; following settings must be defined:                                         *
 0084                    13     ?C?XPAGE1SFR  DATA  084H  ; SFR Address of XPAGE1 register (DPP register)     *
 0000                    14     ?C?XPAGE1RST  EQU   0     ; XPAGE1 register value to address X:0 region       *
                         15     ;                                                                             *
                         16     ; The C51 Compiler must be used with the VARBANKING directive.  If your       *
                         17     ; application accesses XDATA memory in interrupts, VARBANKING(1) must be      *
                         18     ; applied.  With VARBANING(1) the C51 compiler saves the ?C?XPAGE1SFR and     *
                         19     ; sets this register to the ?C?XPAGE1RST value.                               *
                         20     ;                                                                             *
                         21     ;-----------------------------------------------------------------------------*
                         22     ;
                         23     ;******************************************************************************
                         24     ;                                                                             *
                         25     ; THEORY OF OPERATION                                                         *
                         26     ; -------------------                                                         *
                         27     ; This section describes how the extended LX51 linker/locater manages the     *
                         28     ; extended address spaces that are addressed with the new C51 memory types    *
                         29     ; 'far' and 'far const'.  The C51 Compiler uses 3 byte pointer generic        *
                         30     ; pointer to access these memory areas.  'far' variables are placed in the    *
                         31     ; memory class HDATA and 'far const' variables get the memory class 'HCONST'. *
                         32     ; The LX51 linker/locater allows you to locate these memory classes in the    *
                         33     ; logical 16 MBYTE CODE or 16 MBYTE XDATA spaces.                             *
                         34     ;                                                                             *
                         35     ; The memory access itself is performed via eight different subroutines that  *
                         36     ; can be configured in this assembler module.  These routines are:            *
                         37     ;    ?C?CLDXPTR, ?C?CSTXPTR  ; load/store BYTE (char)  in extended memory     *
                         38     ;    ?C?ILDXPTR, ?C?ISTXPTR  ; load/store WORD (int)   in extended memory     *
                         39     ;    ?C?PLDXPTR, ?C?PSTXPTR  ; load/store 3-BYTE PTR   in extended memory     *
                         40     ;    ?C?LLDXPTR, ?C?LSTXPTR  ; load/store DWORD (long) in extended memory     *
                         41     ;                                                                             *
                         42     ; Each function gets as a parameter the memory address with 3 BYTE POINTER    *
                         43     ; representation in the CPU registers R1/R2/R3.  The register R3 holds the    *
                         44     ; memory type.  The C51 compiler uses the following memory types:             *
                         45     ;                                                                             *
                         46     ; R3 Value | Memory Type | Memory Class | Address Range                       *
                         47     ; -----------------------+--------------+--------------------------           *
                         48     ;    00    | data/idata  | DATA/IDATA   | I:0x00     .. I:0xFF                *
                         49     ;    01    | xdata       | XDATA        | X:0x0000   .. X:0xFFFF              *
                         50     ;  02..7F  | far         | HDATA        | X:0x010000 .. X:0x7E0000            *
                         51     ;  80..FD  | far const   | HCONST       | C:0x800000 .. C:0xFD0000 (see note) *
                         52     ;    FE    | pdata       | XDATA        | one 256-byte page in XDATA memory   *
                         53     ;    FF    | code        | CODE         | C:0x0000   .. C:0xFFFF              *
                         54     ;                                                                             *
                         55     ; Note: the far const memory area is mapped into the banked memory areas.     *
                         56     ;                                                                             *
                         57     ; The R3 values 00, 01, FE and FF are already handled within the C51 run-time *
                         58     ; library.  Only the values 02..FE are passed to the XPTR access functions    *
AX51 MACRO ASSEMBLER  XBANKING                                                              30/09/04 14:28:54 PAGE     2

                         59     ; described below.  The AX51 macro assembler provides the MBYTE operator      *
                         60     ; that calculates the R3 value that needs to be passed to the XPTR access     *
                         61     ; function.   AX51 Assembler example for using XPTR access functions:         *
                         62     ;     MOV  R1,#LOW   (variable)   ; gives LSB address byte of variable        *
                         63     ;     MOV  R1,#HIGH  (variable)   ; gives MSB address byte of variable        *
                         64     ;     MOV  R1,#MBYTE (variable)   ; gives memory type byte of variable        *
                         65     ;     CALL ?C?CLDXPTR             ; load BYTE variable into A                 *
                         66     ;******************************************************************************
                         67     
                         68     
                         69                     NAME    ?C?XBANKING     ; 'far' Memory Access Support
                         70     
                         71     PUBLIC ?C?XPAGE1SFR, ?C?XPAGE1RST
                         72     PUBLIC ?C?CLDXPTR, ?C?CSTXPTR, ?C?ILDXPTR, ?C?ISTXPTR
                         73     PUBLIC ?C?PLDXPTR, ?C?PSTXPTR, ?C?LLDXPTR, ?C?LSTXPTR
                         74     
------                   75     ?C?LIB_CODE     SEGMENT         CODE
------                   76                     RSEG    ?C?LIB_CODE
                         77     
                         78     LOAD_BANK       MACRO
                         79     LOCAL lab
                         80                     MOV     DPL,R1
                         81                     MOV     DPH,R2
                         82                     MOV     ?C?XPAGE1SFR,R3 
                         83                     ANL     ?C?XPAGE1SFR,#07FH
                         84                     CJNE    R3,#80H,lab
                         85     lab:
                         86                     ENDM
                         87     
                         88     
 00F0                    89     B       DATA 0F0H       ; SFR Address
 0082                    90     DPL     DATA 082H
 0083                    91     DPH     DATA 083H
 00E0                    92     ACC     DATA 0E0H
                         93     
                         94     ; CLDXPTR: Load   BYTE in A             via Address given in R1/R2/R3
                         95     
                         96     
000000                   97+1   ?C?CLDXPTR:     LOAD_BANK
00000C 5007             104                     JNC     CLDCODE
00000E 1584             105                     DEC     ?C?XPAGE1SFR
000010 E0               106                     MOVX    A,@DPTR
000011 758400           107                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
000014 22               108                     RET
000015 E4               109     CLDCODE:        CLR     A
000016 93               110                     MOVC    A,@A+DPTR
000017 758400           111                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
00001A 22               112                     RET
                        113     
                        114     ; CSTXPTR: Store  BYTE in A             via Address given in R1/R2/R3
                        115     
                        116     
00001B                  117+1   ?C?CSTXPTR:     LOAD_BANK
000027 5003             124                     JNC     CSTCODE
000029 1584             125                     DEC     ?C?XPAGE1SFR
00002B F0               126                     MOVX    @DPTR,A
00002C 758400           127     CSTCODE:        MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
00002F 22               128                     RET
                        129     
                        130     ; ILDXPTR: Load   WORD in A(LSB)/B(HSB) via Address given in R1/R2/R3 
                        131     
000030                  132+1   ?C?ILDXPTR:     LOAD_BANK
00003C 500B             139                     JNC     ILDCODE
00003E 1584             140                     DEC     ?C?XPAGE1SFR
000040 E0               141                     MOVX    A,@DPTR
000041 F5F0             142                     MOV     B,A
AX51 MACRO ASSEMBLER  XBANKING                                                              30/09/04 14:28:54 PAGE     3

000043 A3               143                     INC     DPTR
000044 E0               144                     MOVX    A,@DPTR
000045 758400           145                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
000048 22               146                     RET
000049 E4               147     ILDCODE:        CLR     A
00004A 93               148                     MOVC    A,@A+DPTR
00004B F5F0             149                     MOV     B,A
00004D 7401             150                     MOV     A,#1
00004F 93               151                     MOVC    A,@A+DPTR
000050 758400           152                     MOV     ?C?XPAGE1SFR,#?C?XPAGE1RST ; Reset Page Register 
000053 22               153                     RET
                        154     
                        155     ; ISTXPTR: Store  WORD in A(HSB)/B(LSB) via Address given in R1/R2/R3 
000054                  156+1   ?C?ISTXPTR:     LOAD_BANK
000060 5007             163                     JNC     ISTCODE

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