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📄 display_6_led.fit.eqn

📁 串口通信实验程序
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--D1_sel[0] is display_6_led:inst3|sel[0] at LC_X24_Y29_N0
--operation mode is normal

D1_sel[0]_lut_out = D1_q[3] # D1_q[4] & D1_q[5];
D1_sel[0] = DFFEAS(D1_sel[0]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );


--D1_sel[1] is display_6_led:inst3|sel[1] at LC_X22_Y29_N2
--operation mode is normal

D1_sel[1]_lut_out = D1_q[4];
D1_sel[1] = DFFEAS(D1_sel[1]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );


--D1_sel[2] is display_6_led:inst3|sel[2] at LC_X25_Y29_N2
--operation mode is normal

D1_sel[2]_lut_out = D1_q[5];
D1_sel[2] = DFFEAS(D1_sel[2]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );


--D1_num[1] is display_6_led:inst3|num[1] at LC_X23_Y29_N9
--operation mode is normal

D1_num[1]_lut_out = D1L31 & (D1_q[3] & C1_Data_out[5] # !D1_q[3] & (C1_Data_out[1]));
D1_num[1] = DFFEAS(D1_num[1]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );


--D1_num[3] is display_6_led:inst3|num[3] at LC_X23_Y29_N8
--operation mode is normal

D1_num[3]_lut_out = D1L31 & (D1_q[3] & (C1_Data_out[7]) # !D1_q[3] & C1_Data_out[3]);
D1_num[3] = DFFEAS(D1_num[3]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );


--D1_num[0] is display_6_led:inst3|num[0] at LC_X24_Y29_N9
--operation mode is normal

D1_num[0]_lut_out = D1L31 & (D1_q[3] & C1_Data_out[4] # !D1_q[3] & (C1_Data_out[0]));
D1_num[0] = DFFEAS(D1_num[0]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );


--D1_num[2] is display_6_led:inst3|num[2] at LC_X24_Y29_N2
--operation mode is normal

D1_num[2]_lut_out = D1L31 & (D1_q[3] & C1_Data_out[6] # !D1_q[3] & (C1_Data_out[2]));
D1_num[2] = DFFEAS(D1_num[2]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );


--D1L1 is display_6_led:inst3|led_a~136 at LC_X24_Y29_N3
--operation mode is normal

D1L1 = D1_num[2] & (D1_num[1] # D1_num[0] $ D1_num[3]) # !D1_num[2] & (D1_num[1] $ D1_num[3] # !D1_num[0]);


--D1L2 is display_6_led:inst3|led_b~156 at LC_X24_Y29_N8
--operation mode is normal

D1L2 = D1_num[2] & (D1_num[1] $ (D1_num[3] # !D1_num[0])) # !D1_num[2] & (!D1_num[3] # !D1_num[1] # !D1_num[0]);


--D1L3 is display_6_led:inst3|led_c~195 at LC_X24_Y29_N6
--operation mode is normal

D1L3 = D1_num[2] & (D1_num[0] & !D1_num[1] # !D1_num[3]) # !D1_num[2] & (D1_num[0] # D1_num[3] # !D1_num[1]);


--D1L4 is display_6_led:inst3|led_d~17 at LC_X24_Y29_N7
--operation mode is normal

D1L4 = D1_num[1] & (D1_num[2] & D1_num[0] # !D1_num[2] & !D1_num[0] & D1_num[3]) # !D1_num[1] & !D1_num[3] & (D1_num[2] $ D1_num[0]);


--D1L5 is display_6_led:inst3|led_e~21 at LC_X24_Y29_N4
--operation mode is normal

D1L5 = D1_num[1] & (D1_num[3] # !D1_num[0]) # !D1_num[1] & (D1_num[2] & (D1_num[3]) # !D1_num[2] & !D1_num[0]);


--D1L6 is display_6_led:inst3|led_f~11 at LC_X24_Y29_N1
--operation mode is normal

D1L6 = D1_num[2] & (D1_num[1] $ !D1_num[3] # !D1_num[0]) # !D1_num[2] & (D1_num[3] # !D1_num[0] & !D1_num[1]);


--D1L7 is display_6_led:inst3|led_g~124 at LC_X24_Y29_N5
--operation mode is normal

D1L7 = D1_num[0] & (D1_num[3] # D1_num[2] $ D1_num[1]) # !D1_num[0] & (D1_num[1] # D1_num[2] $ D1_num[3]);


--C1_scir[4] is sci:inst2|scir[4] at LC_X21_Y30_N5
--operation mode is arithmetic

C1_scir[4]_carry_eqn = (!C1L44 & GND) # (C1L44 & VCC);
C1_scir[4]_lut_out = C1_scir[4] $ !C1_scir[4]_carry_eqn;
C1_scir[4] = DFFEAS(C1_scir[4]_lut_out, GLOBAL(clk_1MHz), VCC, , , A1L31, , , C1L35);

--C1L84 is sci:inst2|scir[4]~220 at LC_X21_Y30_N5
--operation mode is arithmetic

C1L84_cout_0 = C1_scir[4] & !C1L44;
C1L84 = CARRY(C1L84_cout_0);

--C1L94 is sci:inst2|scir[4]~220COUT1_247 at LC_X21_Y30_N5
--operation mode is arithmetic

C1L94_cout_1 = C1_scir[4] & !C1L44;
C1L94 = CARRY(C1L94_cout_1);


--C1_scir[3] is sci:inst2|scir[3] at LC_X21_Y30_N4
--operation mode is arithmetic

C1_scir[3]_lut_out = C1_scir[3] $ (C1L14);
C1_scir[3] = DFFEAS(C1_scir[3]_lut_out, GLOBAL(clk_1MHz), VCC, , , A1L31, , , C1L35);

--C1L44 is sci:inst2|scir[3]~224 at LC_X21_Y30_N4
--operation mode is arithmetic

C1L44 = C1L54;


--C1_scir[2] is sci:inst2|scir[2] at LC_X21_Y30_N3
--operation mode is arithmetic

C1_scir[2]_lut_out = C1_scir[2] $ (!C1L83);
C1_scir[2] = DFFEAS(C1_scir[2]_lut_out, GLOBAL(clk_1MHz), VCC, , , A1L31, , , C1L35);

--C1L14 is sci:inst2|scir[2]~228 at LC_X21_Y30_N3
--operation mode is arithmetic

C1L14_cout_0 = C1_scir[2] & (!C1L83);
C1L14 = CARRY(C1L14_cout_0);

--C1L24 is sci:inst2|scir[2]~228COUT1 at LC_X21_Y30_N3
--operation mode is arithmetic

C1L24_cout_1 = C1_scir[2] & (!C1L93);
C1L24 = CARRY(C1L24_cout_1);


--C1_scir[5] is sci:inst2|scir[5] at LC_X21_Y30_N6
--operation mode is normal

C1_scir[5]_carry_eqn = (!C1L44 & C1L84) # (C1L44 & C1L94);
C1_scir[5]_lut_out = C1_scir[5]_carry_eqn $ C1_scir[5];
C1_scir[5] = DFFEAS(C1_scir[5]_lut_out, GLOBAL(clk_1MHz), VCC, , , ~GND, , , C1L35);


--C1L35 is sci:inst2|Txd~170 at LC_X22_Y30_N6
--operation mode is normal

C1L35 = !C1_scir[5] & (!C1_scir[2] # !C1_scir[3] # !C1_scir[4]);


--C1_din_latch[4] is sci:inst2|din_latch[4] at LC_X22_Y28_N4
--operation mode is normal

C1_din_latch[4]_lut_out = GND;
C1_din_latch[4] = DFFEAS(C1_din_latch[4]_lut_out, GLOBAL(clk_1Hz), VCC, , , B1_q_out[4], , , VCC);


--C1L45 is sci:inst2|Txd~171 at LC_X22_Y28_N5
--operation mode is normal

C1_din_latch[6]_qfbk = C1_din_latch[6];
C1L45 = C1_scir[3] & (C1_scir[2] # C1_din_latch[6]_qfbk) # !C1_scir[3] & !C1_scir[2] & (C1_din_latch[4]);

--C1_din_latch[6] is sci:inst2|din_latch[6] at LC_X22_Y28_N5
--operation mode is normal

C1_din_latch[6] = DFFEAS(C1L45, GLOBAL(clk_1Hz), VCC, , , B1_q_out[6], , , VCC);


--C1_din_latch[7] is sci:inst2|din_latch[7] at LC_X23_Y28_N8
--operation mode is normal

C1_din_latch[7]_lut_out = GND;
C1_din_latch[7] = DFFEAS(C1_din_latch[7]_lut_out, GLOBAL(clk_1Hz), VCC, , , B1_q_out[7], , , VCC);


--C1L55 is sci:inst2|Txd~172 at LC_X22_Y28_N8
--operation mode is normal

C1_din_latch[5]_qfbk = C1_din_latch[5];
C1L55 = C1_scir[2] & (C1L45 & (C1_din_latch[7]) # !C1L45 & C1_din_latch[5]_qfbk) # !C1_scir[2] & C1L45;

--C1_din_latch[5] is sci:inst2|din_latch[5] at LC_X22_Y28_N8
--operation mode is normal

C1_din_latch[5] = DFFEAS(C1L55, GLOBAL(clk_1Hz), VCC, , , B1_q_out[5], , , VCC);


--C1L65 is sci:inst2|Txd~173 at LC_X22_Y30_N4
--operation mode is normal

C1L65 = C1_scir[5] & C1L55;


--B1_q_out[0] is count8:inst|q_out[0] at LC_X23_Y28_N0
--operation mode is arithmetic

B1_q_out[0]_lut_out = !B1_q_out[0];
B1_q_out[0] = DFFEAS(B1_q_out[0]_lut_out, GLOBAL(clk_1Hz), VCC, , , , , , );

--B1L3 is count8:inst|q_out[0]~77 at LC_X23_Y28_N0
--operation mode is arithmetic

B1L3_cout_0 = B1_q_out[0];
B1L3 = CARRY(B1L3_cout_0);

--B1L4 is count8:inst|q_out[0]~77COUT1_109 at LC_X23_Y28_N0
--operation mode is arithmetic

B1L4_cout_1 = B1_q_out[0];
B1L4 = CARRY(B1L4_cout_1);


--C1L75 is sci:inst2|Txd~174 at LC_X22_Y28_N2
--operation mode is normal

C1_din_latch[1]_qfbk = C1_din_latch[1];
C1L75 = C1_scir[3] & (C1_scir[2]) # !C1_scir[3] & (C1_scir[2] & (C1_din_latch[1]_qfbk) # !C1_scir[2] & !B1_q_out[0]);

--C1_din_latch[1] is sci:inst2|din_latch[1] at LC_X22_Y28_N2
--operation mode is normal

C1_din_latch[1] = DFFEAS(C1L75, GLOBAL(clk_1Hz), VCC, , , B1_q_out[1], , , VCC);


--C1_din_latch[3] is sci:inst2|din_latch[3] at LC_X23_Y28_N9
--operation mode is normal

C1_din_latch[3]_lut_out = GND;
C1_din_latch[3] = DFFEAS(C1_din_latch[3]_lut_out, GLOBAL(clk_1Hz), VCC, , , B1_q_out[3], , , VCC);


--C1L85 is sci:inst2|Txd~175 at LC_X22_Y28_N6
--operation mode is normal

C1_din_latch[2]_qfbk = C1_din_latch[2];
C1L85 = C1_scir[3] & (C1L75 & C1_din_latch[3] # !C1L75 & (C1_din_latch[2]_qfbk)) # !C1_scir[3] & (C1L75);

--C1_din_latch[2] is sci:inst2|din_latch[2] at LC_X22_Y28_N6
--operation mode is normal

C1_din_latch[2] = DFFEAS(C1L85, GLOBAL(clk_1Hz), VCC, , , B1_q_out[2], , , VCC);


--C1L95 is sci:inst2|Txd~176 at LC_X22_Y30_N7
--operation mode is normal

C1L95 = C1L35 # C1_scir[4] & (C1L65) # !C1_scir[4] & C1L85;


--C1_rdfull is sci:inst2|rdfull at LC_X22_Y30_N9
--operation mode is normal

C1_rdfull_lut_out = VCC;
C1_rdfull = DFFEAS(C1_rdfull_lut_out, GLOBAL(clk_1MHz), GLOBAL(clk_1Hz), , C1L92, , , , );


--C1_txdf is sci:inst2|txdf at LC_X19_Y30_N2
--operation mode is normal

C1_txdf_lut_out = VCC;
C1_txdf = DFFEAS(C1_txdf_lut_out, GLOBAL(clk_1MHz), GLOBAL(clk_1Hz), , C1L82, , , , );


--D1_q[4] is display_6_led:inst3|q[4] at LC_X23_Y29_N5
--operation mode is arithmetic

D1_q[4]_carry_eqn = (!D1L52 & GND) # (D1L52 & VCC);
D1_q[4]_lut_out = D1_q[4] $ !D1_q[4]_carry_eqn;
D1_q[4] = DFFEAS(D1_q[4]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );

--D1L92 is display_6_led:inst3|q[4]~75 at LC_X23_Y29_N5
--operation mode is arithmetic

D1L92_cout_0 = D1_q[4] & !D1L52;
D1L92 = CARRY(D1L92_cout_0);

--D1L03 is display_6_led:inst3|q[4]~75COUT1_101 at LC_X23_Y29_N5
--operation mode is arithmetic

D1L03_cout_1 = D1_q[4] & !D1L52;
D1L03 = CARRY(D1L03_cout_1);


--D1_q[5] is display_6_led:inst3|q[5] at LC_X23_Y29_N6
--operation mode is normal

D1_q[5]_carry_eqn = (!D1L52 & D1L92) # (D1L52 & D1L03);
D1_q[5]_lut_out = D1_q[5]_carry_eqn $ D1_q[5];
D1_q[5] = DFFEAS(D1_q[5]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );


--D1_q[3] is display_6_led:inst3|q[3] at LC_X23_Y29_N4
--operation mode is arithmetic

D1_q[3]_lut_out = D1_q[3] $ (D1L22);
D1_q[3] = DFFEAS(D1_q[3]_lut_out, GLOBAL(clk_1MHz), VCC, , , , , , );

--D1L52 is display_6_led:inst3|q[3]~83 at LC_X23_Y29_N4
--operation mode is arithmetic

D1L52 = D1L62;


--D1L31 is display_6_led:inst3|num~258 at LC_X23_Y29_N7
--operation mode is normal

D1L31 = !D1_q[4] & !D1_q[5];


--C1_Data_out[5] is sci:inst2|Data_out[5] at LC_X23_Y29_N0
--operation mode is normal

C1_Data_out[5]_lut_out = GND;
C1_Data_out[5] = DFFEAS(C1_Data_out[5]_lut_out, GLOBAL(clk_1MHz), VCC, , C1L61, C1_d_fb[5], , , VCC);


--C1_Data_out[1] is sci:inst2|Data_out[1] at LC_X23_Y30_N9
--operation mode is normal

C1_Data_out[1]_lut_out = GND;
C1_Data_out[1] = DFFEAS(C1_Data_out[1]_lut_out, GLOBAL(clk_1MHz), VCC, , C1L61, C1_d_fb[1], , , VCC);


--C1_Data_out[7] is sci:inst2|Data_out[7] at LC_X24_Y30_N2
--operation mode is normal

C1_Data_out[7]_lut_out = C1_d_fb[7];
C1_Data_out[7] = DFFEAS(C1_Data_out[7]_lut_out, GLOBAL(clk_1MHz), VCC, , C1L61, , , , );


--C1_Data_out[3] is sci:inst2|Data_out[3] at LC_X23_Y30_N4
--operation mode is normal

C1_Data_out[3]_lut_out = GND;
C1_Data_out[3] = DFFEAS(C1_Data_out[3]_lut_out, GLOBAL(clk_1MHz), VCC, , C1L61, C1_d_fb[3], , , VCC);


--C1_Data_out[4] is sci:inst2|Data_out[4] at LC_X23_Y30_N6
--operation mode is normal

C1_Data_out[4]_lut_out = C1_d_fb[4];
C1_Data_out[4] = DFFEAS(C1_Data_out[4]_lut_out, GLOBAL(clk_1MHz), VCC, , C1L61, , , , );


--C1_Data_out[0] is sci:inst2|Data_out[0] at LC_X23_Y30_N2
--operation mode is normal

C1_Data_out[0]_lut_out = C1_d_fb[0];
C1_Data_out[0] = DFFEAS(C1_Data_out[0]_lut_out, GLOBAL(clk_1MHz), VCC, , C1L61, , , , );


--C1_Data_out[6] is sci:inst2|Data_out[6] at LC_X24_Y30_N5
--operation mode is normal

C1_Data_out[6]_lut_out = C1_d_fb[6];
C1_Data_out[6] = DFFEAS(C1_Data_out[6]_lut_out, GLOBAL(clk_1MHz), VCC, , C1L61, , , , );


--C1_Data_out[2] is sci:inst2|Data_out[2] at LC_X23_Y30_N1
--operation mode is normal

C1_Data_out[2]_lut_out = GND;
C1_Data_out[2] = DFFEAS(C1_Data_out[2]_lut_out, GLOBAL(clk_1MHz), VCC, , C1L61, C1_d_fb[2], , , VCC);


--C1_scir[1] is sci:inst2|scir[1] at LC_X21_Y30_N2
--operation mode is arithmetic

C1_scir[1]_lut_out = C1_scir[1] $ (C1L53);
C1_scir[1] = DFFEAS(C1_scir[1]_lut_out, GLOBAL(clk_1MHz), VCC, , , ~GND, , , C1L35);

--C1L83 is sci:inst2|scir[1]~236 at LC_X21_Y30_N2
--operation mode is arithmetic

C1L83_cout_0 = !C1L53 # !C1_scir[1];
C1L83 = CARRY(C1L83_cout_0);

--C1L93 is sci:inst2|scir[1]~236COUT1_246 at LC_X21_Y30_N2
--operation mode is arithmetic

C1L93_cout_1 = !C1L63 # !C1_scir[1];
C1L93 = CARRY(C1L93_cout_1);

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