📄 display_6_led.fit.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Jan 13 11:13:31 2006 " "Info: Processing started: Fri Jan 13 11:13:31 2006" { } { } 0} } { } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off display_6_led -c display_6_led " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off display_6_led -c display_6_led" { } { } 0}
{ "Info" "IMPP_MPP_AVAILABLE_IO_STANDARD_IN_DEVICE" "EP1S10F484C5 " "Info: Auto device selection -- successful I/O standard check for EP1S10F484C5" { } { } 0}
{ "Info" "IMPP_MPP_AVAILABLE_PCI_IO_IN_DEVICE" "EP1S10F484C5 " "Info: Auto device selection -- successful PCI I/O clamp diode check for EP1S10F484C5" { } { } 0}
{ "Info" "IMPP_MPP_AUTO_ASSIGNED_DEVICE" "display_6_led EP1S10F484C5 " "Info: Automatically selected device EP1S10F484C5 for design display_6_led" { } { } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP1S20F484C5 " "Info: Device EP1S20F484C5 is compatible" { } { } 2} } { } 2}
{ "Info" "IFSAC_FSAC_PINS_MISSING_LOCATION_INFO" "17 17 " "Info: No exact pin location assignment(s) for 17 pins of 17 total pins" { { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SA " "Info: Pin SA not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 272 472 648 288 "SA" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "SA" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { SA } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { SA } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SB " "Info: Pin SB not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 288 472 648 304 "SB" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "SB" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { SB } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { SB } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "SC " "Info: Pin SC not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 304 472 648 320 "SC" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "SC" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { SC } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { SC } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "A " "Info: Pin A not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 320 472 648 336 "A" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "A" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { A } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { A } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "B " "Info: Pin B not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 336 472 648 352 "B" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "B" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { B } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { B } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "C " "Info: Pin C not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 352 472 648 368 "C" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "C" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { C } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { C } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "D " "Info: Pin D not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 368 472 648 384 "D" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "D" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { D } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { D } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "E " "Info: Pin E not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 384 472 648 400 "E" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "E" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { E } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { E } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "F " "Info: Pin F not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 400 472 648 416 "F" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "F" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { F } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { F } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "G " "Info: Pin G not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 416 472 648 432 "G" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "G" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { G } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { G } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "DP " "Info: Pin DP not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 432 472 648 448 "DP" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "DP" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { DP } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { DP } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "TXD " "Info: Pin TXD not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 72 640 816 88 "TXD" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "TXD" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { TXD } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { TXD } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "rdFULL " "Info: Pin rdFULL not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 88 640 816 104 "rdFULL" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rdFULL" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { rdFULL } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { rdFULL } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "tdEMPTY " "Info: Pin tdEMPTY not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 104 640 816 120 "tdEMPTY" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "tdEMPTY" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { tdEMPTY } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { tdEMPTY } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "clk_1MHz " "Info: Pin clk_1MHz not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 40 -8 160 56 "clk_1MHz" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk_1MHz" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { clk_1MHz } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { clk_1MHz } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "RXD " "Info: Pin RXD not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 112 -16 152 128 "RXD" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "RXD" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { RXD } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { RXD } "NODE_NAME" } } } 0} { "Info" "IFSAC_FSAC_PIN_MISSING_LOCATION_INFO" "clk_1Hz " "Info: Pin clk_1Hz not assigned to an exact location on the device" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 216 0 168 232 "clk_1Hz" "" } } } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk_1Hz" } } } } { "G:/20036016_5/db/display_6_led_cmp.qrpt" "" { Report "G:/20036016_5/db/display_6_led_cmp.qrpt" Compiler "display_6_led" "UNKNOWN" "V1" "G:/20036016_5/db/display_6_led.quartus_db" { Floorplan "G:/20036016_5/" "" "" { clk_1Hz } "NODE_NAME" } "" } } { "G:/20036016_5/display_6_led.fld" "" { Floorplan "G:/20036016_5/display_6_led.fld" "" "" { clk_1Hz } "NODE_NAME" } } } 0} } { } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" { } { } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" { } { } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" { } { } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" { } { } 0} } { } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" { } { } 0}
{ "Info" "IFSAC_FSAC_FINISH_REG_LOCATION_PROCESSING" "" "Info: Completed register packing on registers with non-logic cell location assignments" { } { } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" { } { } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clk_1MHz Global clock in PIN L2 " "Info: Automatically promoted signal \"clk_1MHz\" to use Global clock in PIN L2" { } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 40 -8 160 56 "clk_1MHz" "" } } } } } 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "clk_1Hz Global clock in PIN L3 " "Info: Automatically promoted some destinations of signal \"clk_1Hz\" to use Global clock in PIN L3" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "sci:inst2\|Data_out\[4\]~11 " "Info: Destination \"sci:inst2\|Data_out\[4\]~11\" may be non-global or may not use global clock" { } { { "sci.vhd" "" { Text "G:/20036016_5/sci.vhd" 9 -1 0 } } } 0} } { { "Block1.bdf" "" { Schematic "G:/20036016_5/Block1.bdf" { { 216 0 168 232 "clk_1Hz" "" } } } } } 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" { } { } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" { } { } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Info: Started Fast Input/Output/OE register processing" { } { } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" { } { } 0}
{ "Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Info: Start inferring scan chains for DSP blocks" { } { } 0}
{ "Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Info: Inferring scan chains for DSP blocks is complete" { } { } 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" { } { } 0}
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