count26.tan.qmsg

串口通信实验程序

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clkin register lpm_counter:bcd1_rtl_0\|cntr_2c7:auto_generated\|safe_q\[3\] register lpm_counter:bcd10_rtl_1\|cntr_e08:auto_generated\|safe_q\[3\] 296.47 MHz 3.373 ns Internal " "Info: Clock \"clkin\" has Internal fmax of 296.47 MHz between source register \"lpm_counter:bcd1_rtl_0\|cntr_2c7:auto_generated\|safe_q\[3\]\" and destination register \"lpm_counter:bcd10_rtl_1\|cntr_e08:auto_generated\|safe_q\[3\]\" (period= 3.373 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.207 ns + Longest register register " "Info: + Longest register to register delay is 3.207 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:bcd1_rtl_0\|cntr_2c7:auto_generated\|safe_q\[3\] 1 REG LC_X1_Y2_N8 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X1_Y2_N8; Fanout = 4; REG Node = 'lpm_counter:bcd1_rtl_0\|cntr_2c7:auto_generated\|safe_q\[3\]'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "" { lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "db/cntr_2c7.tdf" "" { Text "E:/20036016_5/db/cntr_2c7.tdf" 77 8 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.450 ns) + CELL(0.366 ns) 0.816 ns process0~34 2 COMB LC_X1_Y2_N1 1 " "Info: 2: + IC(0.450 ns) + CELL(0.366 ns) = 0.816 ns; Loc. = LC_X1_Y2_N1; Fanout = 1; COMB Node = 'process0~34'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "0.816 ns" { lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] process0~34 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.321 ns) + CELL(0.280 ns) 1.417 ns process0~0 3 COMB LC_X1_Y2_N9 2 " "Info: 3: + IC(0.321 ns) + CELL(0.280 ns) = 1.417 ns; Loc. = LC_X1_Y2_N9; Fanout = 2; COMB Node = 'process0~0'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "0.601 ns" { process0~34 process0~0 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.336 ns) + CELL(0.280 ns) 2.033 ns bcd1\[3\]~12 4 COMB LC_X1_Y2_N0 8 " "Info: 4: + IC(0.336 ns) + CELL(0.280 ns) = 2.033 ns; Loc. = LC_X1_Y2_N0; Fanout = 8; COMB Node = 'bcd1\[3\]~12'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "0.616 ns" { process0~0 bcd1[3]~12 } "NODE_NAME" } "" } } { "count26.vhd" "" { Text "E:/20036016_5/count26.vhd" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.469 ns) + CELL(0.705 ns) 3.207 ns lpm_counter:bcd10_rtl_1\|cntr_e08:auto_generated\|safe_q\[3\] 5 REG LC_X2_Y2_N3 2 " "Info: 5: + IC(0.469 ns) + CELL(0.705 ns) = 3.207 ns; Loc. = LC_X2_Y2_N3; Fanout = 2; REG Node = 'lpm_counter:bcd10_rtl_1\|cntr_e08:auto_generated\|safe_q\[3\]'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "1.174 ns" { bcd1[3]~12 lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "db/cntr_e08.tdf" "" { Text "E:/20036016_5/db/cntr_e08.tdf" 77 8 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.631 ns 50.86 % " "Info: Total cell delay = 1.631 ns ( 50.86 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.576 ns 49.14 % " "Info: Total interconnect delay = 1.576 ns ( 49.14 % )" {  } {  } 0}  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "3.207 ns" { lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] process0~34 process0~0 bcd1[3]~12 lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "3.207 ns" { lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] process0~34 process0~0 bcd1[3]~12 lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } { 0.000ns 0.450ns 0.321ns 0.336ns 0.469ns } { 0.000ns 0.366ns 0.280ns 0.280ns 0.705ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clkin destination 2.942 ns + Shortest register " "Info: + Shortest clock path from clock \"clkin\" to destination register is 2.942 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clkin 1 CLK PIN_L2 9 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 9; CLK Node = 'clkin'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "" { clkin } "NODE_NAME" } "" } } { "count26.vhd" "" { Text "E:/20036016_5/count26.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.675 ns) + CELL(0.542 ns) 2.942 ns lpm_counter:bcd10_rtl_1\|cntr_e08:auto_generated\|safe_q\[3\] 2 REG LC_X2_Y2_N3 2 " "Info: 2: + IC(1.675 ns) + CELL(0.542 ns) = 2.942 ns; Loc. = LC_X2_Y2_N3; Fanout = 2; REG Node = 'lpm_counter:bcd10_rtl_1\|cntr_e08:auto_generated\|safe_q\[3\]'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.217 ns" { clkin lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "db/cntr_e08.tdf" "" { Text "E:/20036016_5/db/cntr_e08.tdf" 77 8 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns 43.07 % " "Info: Total cell delay = 1.267 ns ( 43.07 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.675 ns 56.93 % " "Info: Total interconnect delay = 1.675 ns ( 56.93 % )" {  } {  } 0}  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.942 ns" { clkin lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "2.942 ns" { clkin clkin~out0 lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } { 0.000ns 0.000ns 1.675ns } { 0.000ns 0.725ns 0.542ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clkin source 2.942 ns - Longest register " "Info: - Longest clock path from clock \"clkin\" to source register is 2.942 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clkin 1 CLK PIN_L2 9 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 9; CLK Node = 'clkin'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "" { clkin } "NODE_NAME" } "" } } { "count26.vhd" "" { Text "E:/20036016_5/count26.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.675 ns) + CELL(0.542 ns) 2.942 ns lpm_counter:bcd1_rtl_0\|cntr_2c7:auto_generated\|safe_q\[3\] 2 REG LC_X1_Y2_N8 4 " "Info: 2: + IC(1.675 ns) + CELL(0.542 ns) = 2.942 ns; Loc. = LC_X1_Y2_N8; Fanout = 4; REG Node = 'lpm_counter:bcd1_rtl_0\|cntr_2c7:auto_generated\|safe_q\[3\]'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.217 ns" { clkin lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "db/cntr_2c7.tdf" "" { Text "E:/20036016_5/db/cntr_2c7.tdf" 77 8 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns 43.07 % " "Info: Total cell delay = 1.267 ns ( 43.07 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.675 ns 56.93 % " "Info: Total interconnect delay = 1.675 ns ( 56.93 % )" {  } {  } 0}  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.942 ns" { clkin lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "2.942 ns" { clkin clkin~out0 lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] } { 0.000ns 0.000ns 1.675ns } { 0.000ns 0.725ns 0.542ns } } }  } 0}  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.942 ns" { clkin lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "2.942 ns" { clkin clkin~out0 lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } { 0.000ns 0.000ns 1.675ns } { 0.000ns 0.725ns 0.542ns } } } { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.942 ns" { clkin lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "2.942 ns" { clkin clkin~out0 lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] } { 0.000ns 0.000ns 1.675ns } { 0.000ns 0.725ns 0.542ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.156 ns + " "Info: + Micro clock to output delay of source is 0.156 ns" {  } { { "db/cntr_2c7.tdf" "" { Text "E:/20036016_5/db/cntr_2c7.tdf" 77 8 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.010 ns + " "Info: + Micro setup delay of destination is 0.010 ns" {  } { { "db/cntr_e08.tdf" "" { Text "E:/20036016_5/db/cntr_e08.tdf" 77 8 0 } }  } 0}  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "3.207 ns" { lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] process0~34 process0~0 bcd1[3]~12 lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "3.207 ns" { lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] process0~34 process0~0 bcd1[3]~12 lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } { 0.000ns 0.450ns 0.321ns 0.336ns 0.469ns } { 0.000ns 0.366ns 0.280ns 0.280ns 0.705ns } } } { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.942 ns" { clkin lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "2.942 ns" { clkin clkin~out0 lpm_counter:bcd10_rtl_1|cntr_e08:auto_generated|safe_q[3] } { 0.000ns 0.000ns 1.675ns } { 0.000ns 0.725ns 0.542ns } } } { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.942 ns" { clkin lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "2.942 ns" { clkin clkin~out0 lpm_counter:bcd1_rtl_0|cntr_2c7:auto_generated|safe_q[3] } { 0.000ns 0.000ns 1.675ns } { 0.000ns 0.725ns 0.542ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clkin clkout clkout~reg0 6.269 ns register " "Info: tco from clock \"clkin\" to destination pin \"clkout\" through register \"clkout~reg0\" is 6.269 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clkin source 2.942 ns + Longest register " "Info: + Longest clock path from clock \"clkin\" to source register is 2.942 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clkin 1 CLK PIN_L2 9 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 9; CLK Node = 'clkin'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "" { clkin } "NODE_NAME" } "" } } { "count26.vhd" "" { Text "E:/20036016_5/count26.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.675 ns) + CELL(0.542 ns) 2.942 ns clkout~reg0 2 REG LC_X1_Y2_N4 1 " "Info: 2: + IC(1.675 ns) + CELL(0.542 ns) = 2.942 ns; Loc. = LC_X1_Y2_N4; Fanout = 1; REG Node = 'clkout~reg0'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.217 ns" { clkin clkout~reg0 } "NODE_NAME" } "" } } { "count26.vhd" "" { Text "E:/20036016_5/count26.vhd" 14 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns 43.07 % " "Info: Total cell delay = 1.267 ns ( 43.07 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.675 ns 56.93 % " "Info: Total interconnect delay = 1.675 ns ( 56.93 % )" {  } {  } 0}  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.942 ns" { clkin clkout~reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "2.942 ns" { clkin clkin~out0 clkout~reg0 } { 0.000ns 0.000ns 1.675ns } { 0.000ns 0.725ns 0.542ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.156 ns + " "Info: + Micro clock to output delay of source is 0.156 ns" {  } { { "count26.vhd" "" { Text "E:/20036016_5/count26.vhd" 14 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "3.171 ns + Longest register pin " "Info: + Longest register to pin delay is 3.171 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns clkout~reg0 1 REG LC_X1_Y2_N4 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X1_Y2_N4; Fanout = 1; REG Node = 'clkout~reg0'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "" { clkout~reg0 } "NODE_NAME" } "" } } { "count26.vhd" "" { Text "E:/20036016_5/count26.vhd" 14 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.795 ns) + CELL(2.376 ns) 3.171 ns clkout 2 PIN PIN_W21 0 " "Info: 2: + IC(0.795 ns) + CELL(2.376 ns) = 3.171 ns; Loc. = PIN_W21; Fanout = 0; PIN Node = 'clkout'" {  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "3.171 ns" { clkout~reg0 clkout } "NODE_NAME" } "" } } { "count26.vhd" "" { Text "E:/20036016_5/count26.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.376 ns 74.93 % " "Info: Total cell delay = 2.376 ns ( 74.93 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.795 ns 25.07 % " "Info: Total interconnect delay = 0.795 ns ( 25.07 % )" {  } {  } 0}  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "3.171 ns" { clkout~reg0 clkout } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "3.171 ns" { clkout~reg0 clkout } { 0.000ns 0.795ns } { 0.000ns 2.376ns } } }  } 0}  } { { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "2.942 ns" { clkin clkout~reg0 } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "2.942 ns" { clkin clkin~out0 clkout~reg0 } { 0.000ns 0.000ns 1.675ns } { 0.000ns 0.725ns 0.542ns } } } { "E:/20036016_5/db/count26_cmp.qrpt" "" { Report "E:/20036016_5/db/count26_cmp.qrpt" Compiler "count26" "UNKNOWN" "V1" "E:/20036016_5/db/count26.quartus_db" { Floorplan "E:/20036016_5/" "" "3.171 ns" { clkout~reg0 clkout } "NODE_NAME" } "" } } { "d:/altera/quartus42/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus42/bin/Technology_Viewer.qrui" "3.171 ns" { clkout~reg0 clkout } { 0.000ns 0.795ns } { 0.000ns 2.376ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Thu Jan 12 19:51:51 2006 " "Info: Processing ended: Thu Jan 12 19:51:51 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0}  } {  } 0}