📄 display_6_led.map.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
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--D1_sel[0] is display_6_led:inst3|sel[0]
--operation mode is normal
D1_sel[0]_lut_out = D1_q[3] # D1_q[4] & D1_q[5];
D1_sel[0] = DFFEAS(D1_sel[0]_lut_out, clk_1MHz, VCC, , , , , , );
--D1_sel[1] is display_6_led:inst3|sel[1]
--operation mode is normal
D1_sel[1]_lut_out = D1_q[4];
D1_sel[1] = DFFEAS(D1_sel[1]_lut_out, clk_1MHz, VCC, , , , , , );
--D1_sel[2] is display_6_led:inst3|sel[2]
--operation mode is normal
D1_sel[2]_lut_out = D1_q[5];
D1_sel[2] = DFFEAS(D1_sel[2]_lut_out, clk_1MHz, VCC, , , , , , );
--D1_num[1] is display_6_led:inst3|num[1]
--operation mode is normal
D1_num[1]_lut_out = D1L31 & (D1_q[3] & C1_Data_out[5] # !D1_q[3] & (C1_Data_out[1]));
D1_num[1] = DFFEAS(D1_num[1]_lut_out, clk_1MHz, VCC, , , , , , );
--D1_num[3] is display_6_led:inst3|num[3]
--operation mode is normal
D1_num[3]_lut_out = D1L31 & (D1_q[3] & C1_Data_out[7] # !D1_q[3] & (C1_Data_out[3]));
D1_num[3] = DFFEAS(D1_num[3]_lut_out, clk_1MHz, VCC, , , , , , );
--D1_num[0] is display_6_led:inst3|num[0]
--operation mode is normal
D1_num[0]_lut_out = D1L31 & (D1_q[3] & C1_Data_out[4] # !D1_q[3] & (C1_Data_out[0]));
D1_num[0] = DFFEAS(D1_num[0]_lut_out, clk_1MHz, VCC, , , , , , );
--D1_num[2] is display_6_led:inst3|num[2]
--operation mode is normal
D1_num[2]_lut_out = D1L31 & (D1_q[3] & C1_Data_out[6] # !D1_q[3] & (C1_Data_out[2]));
D1_num[2] = DFFEAS(D1_num[2]_lut_out, clk_1MHz, VCC, , , , , , );
--D1L1 is display_6_led:inst3|led_a~136
--operation mode is normal
D1L1 = D1_num[3] & (D1_num[1] $ !D1_num[2] # !D1_num[0]) # !D1_num[3] & (D1_num[1] # D1_num[0] $ !D1_num[2]);
--D1L2 is display_6_led:inst3|led_b~156
--operation mode is normal
D1L2 = D1_num[0] & (D1_num[3] & (!D1_num[1]) # !D1_num[3] & (D1_num[1] # !D1_num[2])) # !D1_num[0] & (!D1_num[1] # !D1_num[2]);
--D1L3 is display_6_led:inst3|led_c~195
--operation mode is normal
D1L3 = D1_num[3] & (D1_num[0] & !D1_num[1] # !D1_num[2]) # !D1_num[3] & (D1_num[0] # D1_num[2] # !D1_num[1]);
--D1L4 is display_6_led:inst3|led_d~17
--operation mode is normal
D1L4 = D1_num[1] & (D1_num[0] & D1_num[2] # !D1_num[0] & !D1_num[2] & D1_num[3]) # !D1_num[1] & !D1_num[3] & (D1_num[0] $ D1_num[2]);
--D1L5 is display_6_led:inst3|led_e~21
--operation mode is normal
D1L5 = D1_num[1] & (D1_num[3] # !D1_num[0]) # !D1_num[1] & (D1_num[2] & D1_num[3] # !D1_num[2] & (!D1_num[0]));
--D1L6 is display_6_led:inst3|led_f~11
--operation mode is normal
D1L6 = D1_num[1] & (D1_num[3] # !D1_num[0] & D1_num[2]) # !D1_num[1] & (D1_num[3] $ D1_num[2] # !D1_num[0]);
--D1L7 is display_6_led:inst3|led_g~124
--operation mode is normal
D1L7 = D1_num[0] & (D1_num[3] # D1_num[1] $ D1_num[2]) # !D1_num[0] & (D1_num[1] # D1_num[3] $ D1_num[2]);
--C1_scir[4] is sci:inst2|scir[4]
--operation mode is arithmetic
C1_scir[4]_carry_eqn = C1L14;
C1_scir[4]_lut_out = C1_scir[4] $ (!C1_scir[4]_carry_eqn);
C1_scir[4] = DFFEAS(C1_scir[4]_lut_out, clk_1MHz, VCC, , , A1L31, , , C1L74);
--C1L34 is sci:inst2|scir[4]~220
--operation mode is arithmetic
C1L34 = CARRY(C1_scir[4] & (!C1L14));
--C1_scir[3] is sci:inst2|scir[3]
--operation mode is arithmetic
C1_scir[3]_carry_eqn = C1L93;
C1_scir[3]_lut_out = C1_scir[3] $ (C1_scir[3]_carry_eqn);
C1_scir[3] = DFFEAS(C1_scir[3]_lut_out, clk_1MHz, VCC, , , A1L31, , , C1L74);
--C1L14 is sci:inst2|scir[3]~224
--operation mode is arithmetic
C1L14 = CARRY(!C1L93 # !C1_scir[3]);
--C1_scir[2] is sci:inst2|scir[2]
--operation mode is arithmetic
C1_scir[2]_carry_eqn = C1L73;
C1_scir[2]_lut_out = C1_scir[2] $ (!C1_scir[2]_carry_eqn);
C1_scir[2] = DFFEAS(C1_scir[2]_lut_out, clk_1MHz, VCC, , , A1L31, , , C1L74);
--C1L93 is sci:inst2|scir[2]~228
--operation mode is arithmetic
C1L93 = CARRY(C1_scir[2] & (!C1L73));
--C1_scir[5] is sci:inst2|scir[5]
--operation mode is normal
C1_scir[5]_carry_eqn = C1L34;
C1_scir[5]_lut_out = C1_scir[5] $ (C1_scir[5]_carry_eqn);
C1_scir[5] = DFFEAS(C1_scir[5]_lut_out, clk_1MHz, VCC, , , ~GND, , , C1L74);
--C1L74 is sci:inst2|Txd~170
--operation mode is normal
C1L74 = !C1_scir[5] & (!C1_scir[2] # !C1_scir[3] # !C1_scir[4]);
--C1_din_latch[5] is sci:inst2|din_latch[5]
--operation mode is normal
C1_din_latch[5]_lut_out = B1_q_out[5];
C1_din_latch[5] = DFFEAS(C1_din_latch[5]_lut_out, clk_1Hz, VCC, , , , , , );
--C1_din_latch[6] is sci:inst2|din_latch[6]
--operation mode is normal
C1_din_latch[6]_lut_out = B1_q_out[6];
C1_din_latch[6] = DFFEAS(C1_din_latch[6]_lut_out, clk_1Hz, VCC, , , , , , );
--C1_din_latch[4] is sci:inst2|din_latch[4]
--operation mode is normal
C1_din_latch[4]_lut_out = B1_q_out[4];
C1_din_latch[4] = DFFEAS(C1_din_latch[4]_lut_out, clk_1Hz, VCC, , , , , , );
--C1L84 is sci:inst2|Txd~171
--operation mode is normal
C1L84 = C1_scir[2] & (C1_scir[3]) # !C1_scir[2] & (C1_scir[3] & C1_din_latch[6] # !C1_scir[3] & (C1_din_latch[4]));
--C1_din_latch[7] is sci:inst2|din_latch[7]
--operation mode is normal
C1_din_latch[7]_lut_out = B1_q_out[7];
C1_din_latch[7] = DFFEAS(C1_din_latch[7]_lut_out, clk_1Hz, VCC, , , , , , );
--C1L94 is sci:inst2|Txd~172
--operation mode is normal
C1L94 = C1_scir[2] & (C1L84 & (C1_din_latch[7]) # !C1L84 & C1_din_latch[5]) # !C1_scir[2] & (C1L84);
--C1L05 is sci:inst2|Txd~173
--operation mode is normal
C1L05 = C1_scir[5] & C1L94;
--C1_din_latch[2] is sci:inst2|din_latch[2]
--operation mode is normal
C1_din_latch[2]_lut_out = B1_q_out[2];
C1_din_latch[2] = DFFEAS(C1_din_latch[2]_lut_out, clk_1Hz, VCC, , , , , , );
--C1_din_latch[1] is sci:inst2|din_latch[1]
--operation mode is normal
C1_din_latch[1]_lut_out = B1_q_out[1];
C1_din_latch[1] = DFFEAS(C1_din_latch[1]_lut_out, clk_1Hz, VCC, , , , , , );
--B1_q_out[0] is count8:inst|q_out[0]
--operation mode is arithmetic
B1_q_out[0]_lut_out = !B1_q_out[0];
B1_q_out[0] = DFFEAS(B1_q_out[0]_lut_out, clk_1Hz, VCC, , , , , , );
--B1L3 is count8:inst|q_out[0]~77
--operation mode is arithmetic
B1L3 = CARRY(B1_q_out[0]);
--C1L15 is sci:inst2|Txd~174
--operation mode is normal
C1L15 = C1_scir[3] & (C1_scir[2]) # !C1_scir[3] & (C1_scir[2] & C1_din_latch[1] # !C1_scir[2] & (!B1_q_out[0]));
--C1_din_latch[3] is sci:inst2|din_latch[3]
--operation mode is normal
C1_din_latch[3]_lut_out = B1_q_out[3];
C1_din_latch[3] = DFFEAS(C1_din_latch[3]_lut_out, clk_1Hz, VCC, , , , , , );
--C1L25 is sci:inst2|Txd~175
--operation mode is normal
C1L25 = C1_scir[3] & (C1L15 & (C1_din_latch[3]) # !C1L15 & C1_din_latch[2]) # !C1_scir[3] & (C1L15);
--C1L35 is sci:inst2|Txd~176
--operation mode is normal
C1L35 = C1L74 # C1_scir[4] & C1L05 # !C1_scir[4] & (C1L25);
--C1_rdfull is sci:inst2|rdfull
--operation mode is normal
C1_rdfull_lut_out = VCC;
C1_rdfull = DFFEAS(C1_rdfull_lut_out, clk_1MHz, clk_1Hz, , C1L92, , , , );
--C1_txdf is sci:inst2|txdf
--operation mode is normal
C1_txdf_lut_out = VCC;
C1_txdf = DFFEAS(C1_txdf_lut_out, clk_1MHz, clk_1Hz, , C1L82, , , , );
--D1_q[4] is display_6_led:inst3|q[4]
--operation mode is arithmetic
D1_q[4]_carry_eqn = D1L22;
D1_q[4]_lut_out = D1_q[4] $ (!D1_q[4]_carry_eqn);
D1_q[4] = DFFEAS(D1_q[4]_lut_out, clk_1MHz, VCC, , , , , , );
--D1L42 is display_6_led:inst3|q[4]~75
--operation mode is arithmetic
D1L42 = CARRY(D1_q[4] & (!D1L22));
--D1_q[5] is display_6_led:inst3|q[5]
--operation mode is normal
D1_q[5]_carry_eqn = D1L42;
D1_q[5]_lut_out = D1_q[5] $ (D1_q[5]_carry_eqn);
D1_q[5] = DFFEAS(D1_q[5]_lut_out, clk_1MHz, VCC, , , , , , );
--D1_q[3] is display_6_led:inst3|q[3]
--operation mode is arithmetic
D1_q[3]_carry_eqn = D1L02;
D1_q[3]_lut_out = D1_q[3] $ (D1_q[3]_carry_eqn);
D1_q[3] = DFFEAS(D1_q[3]_lut_out, clk_1MHz, VCC, , , , , , );
--D1L22 is display_6_led:inst3|q[3]~83
--operation mode is arithmetic
D1L22 = CARRY(!D1L02 # !D1_q[3]);
--D1L31 is display_6_led:inst3|num~258
--operation mode is normal
D1L31 = !D1_q[4] & !D1_q[5];
--C1_Data_out[5] is sci:inst2|Data_out[5]
--operation mode is normal
C1_Data_out[5]_lut_out = C1_d_fb[5];
C1_Data_out[5] = DFFEAS(C1_Data_out[5]_lut_out, clk_1MHz, VCC, , C1L61, , , , );
--C1_Data_out[1] is sci:inst2|Data_out[1]
--operation mode is normal
C1_Data_out[1]_lut_out = C1_d_fb[1];
C1_Data_out[1] = DFFEAS(C1_Data_out[1]_lut_out, clk_1MHz, VCC, , C1L61, , , , );
--C1_Data_out[7] is sci:inst2|Data_out[7]
--operation mode is normal
C1_Data_out[7]_lut_out = C1_d_fb[7];
C1_Data_out[7] = DFFEAS(C1_Data_out[7]_lut_out, clk_1MHz, VCC, , C1L61, , , , );
--C1_Data_out[3] is sci:inst2|Data_out[3]
--operation mode is normal
C1_Data_out[3]_lut_out = C1_d_fb[3];
C1_Data_out[3] = DFFEAS(C1_Data_out[3]_lut_out, clk_1MHz, VCC, , C1L61, , , , );
--C1_Data_out[4] is sci:inst2|Data_out[4]
--operation mode is normal
C1_Data_out[4]_lut_out = C1_d_fb[4];
C1_Data_out[4] = DFFEAS(C1_Data_out[4]_lut_out, clk_1MHz, VCC, , C1L61, , , , );
--C1_Data_out[0] is sci:inst2|Data_out[0]
--operation mode is normal
C1_Data_out[0]_lut_out = C1_d_fb[0];
C1_Data_out[0] = DFFEAS(C1_Data_out[0]_lut_out, clk_1MHz, VCC, , C1L61, , , , );
--C1_Data_out[6] is sci:inst2|Data_out[6]
--operation mode is normal
C1_Data_out[6]_lut_out = C1_d_fb[6];
C1_Data_out[6] = DFFEAS(C1_Data_out[6]_lut_out, clk_1MHz, VCC, , C1L61, , , , );
--C1_Data_out[2] is sci:inst2|Data_out[2]
--operation mode is normal
C1_Data_out[2]_lut_out = C1_d_fb[2];
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