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-- Copyright (C) 1991-2005 Altera Corporation
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-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
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-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--E1_sel[0] is display_6_led:inst3|sel[0]
--operation mode is normal
E1_sel[0]_lut_out = G3_q[3] # G3_q[5] & G3_q[4];
E1_sel[0] = DFFEA(E1_sel[0]_lut_out, B1_clkout, , , , , );
--E1L64Q is display_6_led:inst3|sel[0]~76
--operation mode is normal
E1L64Q = E1_sel[0];
--G2_q[3] is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is up_dn_cntr
G2_q[3]_lut_out = G2_q[3] $ G2L7;
G2_q[3] = DFFEA(G2_q[3]_lut_out, clk_1Hz, , , , , );
--G2L52Q is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|q[3]~0
--operation mode is up_dn_cntr
G2L52Q = G2_q[3];
--G2L9 is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT
--operation mode is up_dn_cntr
G2L9 = CARRY(G2_q[3] & (G2L7));
--G2_q[2] is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is up_dn_cntr
G2_q[2]_lut_out = G2_q[2] $ G2L5;
G2_q[2] = DFFEA(G2_q[2]_lut_out, clk_1Hz, , , , , );
--G2L32Q is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|q[2]~1
--operation mode is up_dn_cntr
G2L32Q = G2_q[2];
--G2L7 is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is up_dn_cntr
G2L7 = CARRY(G2_q[2] & (G2L5));
--G2_q[1] is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is up_dn_cntr
G2_q[1]_lut_out = G2_q[1] $ G2L3;
G2_q[1] = DFFEA(G2_q[1]_lut_out, clk_1Hz, , , , , );
--G2L12Q is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~2
--operation mode is up_dn_cntr
G2L12Q = G2_q[1];
--G2L5 is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is up_dn_cntr
G2L5 = CARRY(G2_q[1] & (G2L3));
--G2_q[0] is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is up_dn_cntr
G2_q[0]_lut_out = !G2_q[0];
G2_q[0] = DFFEA(G2_q[0]_lut_out, clk_1Hz, , , , , );
--G2L91Q is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~3
--operation mode is up_dn_cntr
G2L91Q = G2_q[0];
--G2L3 is count8:inst1|lpm_counter:q_out_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is up_dn_cntr
G2L3 = CARRY(G2_q[0]);
--E1_sel[1] is display_6_led:inst3|sel[1]
--operation mode is normal
E1_sel[1]_lut_out = G3_q[4];
E1_sel[1] = DFFEA(E1_sel[1]_lut_out, B1_clkout, , , , , );
--E1L84Q is display_6_led:inst3|sel[1]~77
--operation mode is normal
E1L84Q = E1_sel[1];
--E1_sel[2] is display_6_led:inst3|sel[2]
--operation mode is normal
E1_sel[2]_lut_out = G3_q[5];
E1_sel[2] = DFFEA(E1_sel[2]_lut_out, B1_clkout, , , , , );
--E1L05Q is display_6_led:inst3|sel[2]~78
--operation mode is normal
E1L05Q = E1_sel[2];
--E1_num[0] is display_6_led:inst3|num[0]
--operation mode is normal
E1_num[0]_lut_out = !E1L82;
E1_num[0] = DFFEA(E1_num[0]_lut_out, B1_clkout, , , , , );
--E1L71Q is display_6_led:inst3|num[0]~187
--operation mode is normal
E1L71Q = E1_num[0];
--E1_num[1] is display_6_led:inst3|num[1]
--operation mode is normal
E1_num[1]_lut_out = !E1L92;
E1_num[1] = DFFEA(E1_num[1]_lut_out, B1_clkout, , , , , );
--E1L91Q is display_6_led:inst3|num[1]~188
--operation mode is normal
E1L91Q = E1_num[1];
--E1_num[2] is display_6_led:inst3|num[2]
--operation mode is normal
E1_num[2]_lut_out = !E1L03;
E1_num[2] = DFFEA(E1_num[2]_lut_out, B1_clkout, , , , , );
--E1L12Q is display_6_led:inst3|num[2]~189
--operation mode is normal
E1L12Q = E1_num[2];
--E1_num[3] is display_6_led:inst3|num[3]
--operation mode is normal
E1_num[3]_lut_out = !E1L13;
E1_num[3] = DFFEA(E1_num[3]_lut_out, B1_clkout, , , , , );
--E1L32Q is display_6_led:inst3|num[3]~190
--operation mode is normal
E1L32Q = E1_num[3];
--E1L1 is display_6_led:inst3|led_a~5
--operation mode is normal
E1L1 = E1_num[2] & !E1_num[1] & (E1_num[0] $ !E1_num[3]) # !E1_num[2] & E1_num[0] & (E1_num[1] $ !E1_num[3]);
--E1L2 is display_6_led:inst3|led_a~6
--operation mode is normal
E1L2 = E1_num[2] & !E1_num[1] & (E1_num[0] $ !E1_num[3]) # !E1_num[2] & E1_num[0] & (E1_num[1] $ !E1_num[3]);
--E1L3 is display_6_led:inst3|led_b~5
--operation mode is normal
E1L3 = E1_num[0] & (E1_num[1] & (E1_num[3]) # !E1_num[1] & E1_num[2] & !E1_num[3]) # !E1_num[0] & E1_num[1] & E1_num[2];
--E1L4 is display_6_led:inst3|led_b~6
--operation mode is normal
E1L4 = E1_num[0] & (E1_num[1] & (E1_num[3]) # !E1_num[1] & E1_num[2] & !E1_num[3]) # !E1_num[0] & E1_num[1] & E1_num[2];
--E1L5 is display_6_led:inst3|led_c~5
--operation mode is normal
E1L5 = E1_num[2] & E1_num[3] & (E1_num[1] # !E1_num[0]) # !E1_num[2] & !E1_num[0] & E1_num[1] & !E1_num[3];
--E1L6 is display_6_led:inst3|led_c~6
--operation mode is normal
E1L6 = E1_num[2] & E1_num[3] & (E1_num[1] # !E1_num[0]) # !E1_num[2] & !E1_num[0] & E1_num[1] & !E1_num[3];
--E1L7 is display_6_led:inst3|led_d~5
--operation mode is normal
E1L7 = E1_num[1] & (E1_num[0] & E1_num[2] # !E1_num[0] & !E1_num[2] & E1_num[3]) # !E1_num[1] & !E1_num[3] & (E1_num[0] $ E1_num[2]);
--E1L8 is display_6_led:inst3|led_d~6
--operation mode is normal
E1L8 = E1_num[1] & (E1_num[0] & E1_num[2] # !E1_num[0] & !E1_num[2] & E1_num[3]) # !E1_num[1] & !E1_num[3] & (E1_num[0] $ E1_num[2]);
--E1L11 is display_6_led:inst3|led_f~5
--operation mode is normal
E1L11 = E1_num[0] & (E1_num[3] $ (E1_num[1] # !E1_num[2])) # !E1_num[0] & E1_num[1] & !E1_num[2] & !E1_num[3];
--E1L21 is display_6_led:inst3|led_f~6
--operation mode is normal
E1L21 = E1_num[0] & (E1_num[3] $ (E1_num[1] # !E1_num[2])) # !E1_num[0] & E1_num[1] & !E1_num[2] & !E1_num[3];
--D1_scir[4] is sci:inst2|scir[4]
--operation mode is normal
D1_scir[4]_lut_out = D1L18 & (!RXD) # !D1L18 & L3_cs_buffer[4];
D1_scir[4] = DFFEA(D1_scir[4]_lut_out, B1_clkout, , , , , );
--D1L67Q is sci:inst2|scir[4]~331
--operation mode is normal
D1L67Q = D1_scir[4];
--D1_scir[3] is sci:inst2|scir[3]
--operation mode is normal
D1_scir[3]_lut_out = D1L18 & (!RXD) # !D1L18 & L3_cs_buffer[3];
D1_scir[3] = DFFEA(D1_scir[3]_lut_out, B1_clkout, , , , , );
--D1L47Q is sci:inst2|scir[3]~332
--operation mode is normal
D1L47Q = D1_scir[3];
--D1_scir[2] is sci:inst2|scir[2]
--operation mode is normal
D1_scir[2]_lut_out = D1L18 & (!RXD) # !D1L18 & L3_cs_buffer[2];
D1_scir[2] = DFFEA(D1_scir[2]_lut_out, B1_clkout, , , , , );
--D1L27Q is sci:inst2|scir[2]~333
--operation mode is normal
D1L27Q = D1_scir[2];
--D1_scir[5] is sci:inst2|scir[5]
--operation mode is normal
D1_scir[5]_lut_out = J1_unreg_res_node[5] & (!D1L18);
D1_scir[5] = DFFEA(D1_scir[5]_lut_out, B1_clkout, , , , , );
--D1L87Q is sci:inst2|scir[5]~334
--operation mode is normal
D1L87Q = D1_scir[5];
--D1L18 is sci:inst2|Txd~127
--operation mode is normal
D1L18 = !D1_scir[5] & (!D1_scir[2] # !D1_scir[3] # !D1_scir[4]);
--D1L88 is sci:inst2|Txd~134
--operation mode is normal
D1L88 = !D1_scir[5] & (!D1_scir[2] # !D1_scir[3] # !D1_scir[4]);
--D1_din_latch[5] is sci:inst2|din_latch[5]
--operation mode is normal
D1_din_latch[5]_lut_out = G2_q[5];
D1_din_latch[5] = DFFEA(D1_din_latch[5]_lut_out, clk_1Hz, , , , , );
--D1L94Q is sci:inst2|din_latch[5]~8
--operation mode is normal
D1L94Q = D1_din_latch[5];
--D1_din_latch[6] is sci:inst2|din_latch[6]
--operation mode is normal
D1_din_latch[6]_lut_out = G2_q[6];
D1_din_latch[6] = DFFEA(D1_din_latch[6]_lut_out, clk_1Hz, , , , , );
--D1L15Q is sci:inst2|din_latch[6]~9
--operation mode is normal
D1L15Q = D1_din_latch[6];
--D1_din_latch[4] is sci:inst2|din_latch[4]
--operation mode is normal
D1_din_latch[4]_lut_out = G2_q[4];
D1_din_latch[4] = DFFEA(D1_din_latch[4]_lut_out, clk_1Hz, , , , , );
--D1L74Q is sci:inst2|din_latch[4]~10
--operation mode is normal
D1L74Q = D1_din_latch[4];
--D1L28 is sci:inst2|Txd~128
--operation mode is normal
D1L28 = D1_scir[2] & (D1_scir[3]) # !D1_scir[2] & (D1_scir[3] & D1_din_latch[6] # !D1_scir[3] & (D1_din_latch[4]));
--D1L98 is sci:inst2|Txd~135
--operation mode is normal
D1L98 = D1_scir[2] & (D1_scir[3]) # !D1_scir[2] & (D1_scir[3] & D1_din_latch[6] # !D1_scir[3] & (D1_din_latch[4]));
--D1_din_latch[7] is sci:inst2|din_latch[7]
--operation mode is normal
D1_din_latch[7]_lut_out = G2_q[7];
D1_din_latch[7] = DFFEA(D1_din_latch[7]_lut_out, clk_1Hz, , , , , );
--D1L35Q is sci:inst2|din_latch[7]~11
--operation mode is normal
D1L35Q = D1_din_latch[7];
--D1L38 is sci:inst2|Txd~129
--operation mode is normal
D1L38 = D1_scir[2] & (D1L28 & (D1_din_latch[7]) # !D1L28 & D1_din_latch[5]) # !D1_scir[2] & (D1L28);
--D1L09 is sci:inst2|Txd~136
--operation mode is normal
D1L09 = D1_scir[2] & (D1L28 & (D1_din_latch[7]) # !D1L28 & D1_din_latch[5]) # !D1_scir[2] & (D1L28);
--D1_din_latch[2] is sci:inst2|din_latch[2]
--operation mode is normal
D1_din_latch[2]_lut_out = G2_q[2];
D1_din_latch[2] = DFFEA(D1_din_latch[2]_lut_out, clk_1Hz, , , , , );
--D1L34Q is sci:inst2|din_latch[2]~12
--operation mode is normal
D1L34Q = D1_din_latch[2];
--D1_din_latch[1] is sci:inst2|din_latch[1]
--operation mode is normal
D1_din_latch[1]_lut_out = G2_q[1];
D1_din_latch[1] = DFFEA(D1_din_latch[1]_lut_out, clk_1Hz, , , , , );
--D1L14Q is sci:inst2|din_latch[1]~13
--operation mode is normal
D1L14Q = D1_din_latch[1];
--D1_din_latch[0] is sci:inst2|din_latch[0]
--operation mode is normal
D1_din_latch[0]_lut_out = G2_q[0];
D1_din_latch[0] = DFFEA(D1_din_latch[0]_lut_out, clk_1Hz, , , , , );
--D1L93Q is sci:inst2|din_latch[0]~14
--operation mode is normal
D1L93Q = D1_din_latch[0];
--D1L48 is sci:inst2|Txd~130
--operation mode is normal
D1L48 = D1_scir[3] & (D1_scir[2]) # !D1_scir[3] & (D1_scir[2] & D1_din_latch[1] # !D1_scir[2] & (D1_din_latch[0]));
--D1L19 is sci:inst2|Txd~137
--operation mode is normal
D1L19 = D1_scir[3] & (D1_scir[2]) # !D1_scir[3] & (D1_scir[2] & D1_din_latch[1] # !D1_scir[2] & (D1_din_latch[0]));
--D1_din_latch[3] is sci:inst2|din_latch[3]
--operation mode is normal
D1_din_latch[3]_lut_out = G2_q[3];
D1_din_latch[3] = DFFEA(D1_din_latch[3]_lut_out, clk_1Hz, , , , , );
--D1L54Q is sci:inst2|din_latch[3]~15
--operation mode is normal
D1L54Q = D1_din_latch[3];
--D1L58 is sci:inst2|Txd~131
--operation mode is normal
D1L58 = D1_scir[3] & (D1L48 & (D1_din_latch[3]) # !D1L48 & D1_din_latch[2]) # !D1_scir[3] & (D1L48);
--D1L29 is sci:inst2|Txd~138
--operation mode is normal
D1L29 = D1_scir[3] & (D1L48 & (D1_din_latch[3]) # !D1L48 & D1_din_latch[2]) # !D1_scir[3] & (D1L48);
--D1L68 is sci:inst2|Txd~132
--operation mode is normal
D1L68 = D1_scir[4] & D1_scir[5] & D1L38 # !D1_scir[4] & (D1L58);
--D1L39 is sci:inst2|Txd~139
--operation mode is normal
D1L39 = D1_scir[4] & D1_scir[5] & D1L38 # !D1_scir[4] & (D1L58);
--D1L78 is sci:inst2|Txd~133
--operation mode is normal
D1L78 = D1L18 # D1L68;
--D1L49 is sci:inst2|Txd~140
--operation mode is normal
D1L49 = D1L18 # D1L68;
--D1_rdfull is sci:inst2|rdfull
--operation mode is normal
D1_rdfull_lut_out = VCC;
D1_rdfull = DFFEA(D1_rdfull_lut_out, B1_clkout, clk_1Hz, , D1L55, , );
--D1L36Q is sci:inst2|rdfull~1
--operation mode is normal
D1L36Q = D1_rdfull;
--D1_tdempty is sci:inst2|tdempty
--operation mode is normal
D1_tdempty_lut_out = VCC;
D1_tdempty = DFFEA(D1_tdempty_lut_out, B1_clkout, clk_1Hz, , D1L85, , );
--D1L08Q is sci:inst2|tdempty~9
--operation mode is normal
D1L08Q = D1_tdempty;
--G3_q[5] is display_6_led:inst3|lpm_counter:q_rtl_1|alt_counter_f10ke:wysi_counter|q[5]
--operation mode is up_dn_cntr
G3_q[5]_lut_out = G3_q[5] $ G3L11;
G3_q[5] = DFFEA(G3_q[5]_lut_out, B1_clkout, , , , , );
--G3L52Q is display_6_led:inst3|lpm_counter:q_rtl_1|alt_counter_f10ke:wysi_counter|q[5]~0
--operation mode is up_dn_cntr
G3L52Q = G3_q[5];
--G3_q[4] is display_6_led:inst3|lpm_counter:q_rtl_1|alt_counter_f10ke:wysi_counter|q[4]
--operation mode is up_dn_cntr
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