total.qsf

串口通信实验程序

# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic       
# functions, and any output files any of the foregoing           
# (including device programming or simulation files), and any    
# associated documentation or information are expressly subject  
# to the terms and conditions of the Altera Program License      
# Subscription Agreement, Altera MegaCore Function License       
# Agreement, or other applicable license agreement, including,   
# without limitation, that your use is for the sole purpose of   
# programming logic devices manufactured by Altera and sold by   
# Altera or its authorized distributors.  Please refer to the    
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		total_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.2
set_global_assignment -name PROJECT_CREATION_TIME_DATE "20:35:23  JANUARY 12, 2006"
set_global_assignment -name LAST_QUARTUS_VERSION 5.0
set_global_assignment -name VECTOR_WAVEFORM_FILE Block1.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE count26.vwf
set_global_assignment -name VECTOR_WAVEFORM_FILE count8.vwf
set_global_assignment -name VHDL_FILE count26.vhd
set_global_assignment -name VHDL_FILE count8.vhd
set_global_assignment -name VHDL_FILE display_6_led.vhd
set_global_assignment -name VHDL_FILE sci.vhd
set_global_assignment -name BDF_FILE total.bdf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_26 -to clk_1Hz
set_location_assignment PIN_55 -to clk_1MHz
set_location_assignment PIN_72 -to A
set_location_assignment PIN_73 -to B
set_location_assignment PIN_78 -to C
set_location_assignment PIN_79 -to D
set_location_assignment PIN_80 -to E
set_location_assignment PIN_81 -to F
set_location_assignment PIN_82 -to G
set_location_assignment PIN_83 -to DP
set_location_assignment PIN_68 -to SA
set_location_assignment PIN_69 -to SB
set_location_assignment PIN_70 -to SC
set_location_assignment PIN_19 -to TXD
set_location_assignment PIN_56 -to RXD
set_location_assignment PIN_116 -to d0
set_location_assignment PIN_114 -to d1
set_location_assignment PIN_113 -to d2
set_location_assignment PIN_112 -to d3

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name FAMILY FLEX10K
set_global_assignment -name TOP_LEVEL_ENTITY total

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE "EPF10K20TI144-4"
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1

# Assembler Assignments
# =====================
set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"