q7230.map.eqn

PLD-N分频程序

--A1L34 is reduce_nor~16
A1L34 = EXP(count[4] & count[3] & !A1L83 & !A1L04);


--A1L44 is reduce_nor~17
A1L44 = EXP(count[2] & !A1L53 & !A1L63);


--A1L54 is reduce_nor~18
A1L54 = EXP(count[3] & !A1L83);


--A1L64 is reduce_nor~19
A1L64 = EXP(!A1L53 & !A1L63);


--A1L74 is reduce_nor~25
A1L74_p0_out = A1L64 & A1L73 & !count[2];
A1L74_p1_out = A1L44 & !A1L83 & count[3];
A1L74_p2_out = A1L54 & A1L93 & !count[4];
A1L74_p3_out = A1L54 & !A1L93 & count[4];
A1L74_p4_out = A1L64 & !A1L73 & count[2];
A1L74_or_out = A1L35 # A1L74_p0_out # A1L74_p1_out # A1L74_p2_out # A1L74_p3_out # A1L74_p4_out;
A1L74 = A1L74_or_out;


--A1L84 is reduce_nor~26
A1L84 = EXP(count[5] & count[1] & count[0] & !A1L83 & !A1L73 & !A1L14 & !A1L93);


--A1L94 is reduce_nor~27
A1L94 = EXP(count[1] & count[0] & !A1L83 & !A1L73 & !A1L93);


--A1L05 is reduce_nor~33
A1L05_p0_out = count[5] & !A1L04 & A1L94;
A1L05_p1_out = !A1L53 & count[5] & !A1L83 & A1L04 & !A1L63 & !A1L73 & !A1L93;
A1L05_p2_out = A1L84 & !count[7] & A1L24;
A1L05_p3_out = A1L84 & count[7] & !A1L24;
A1L05_p4_out = !count[5] & A1L04 & A1L94;
A1L05_or_out = A1L55 # A1L05_p0_out # A1L05_p1_out # A1L05_p2_out # A1L05_p3_out # A1L05_p4_out;
A1L05 = A1L05_or_out;


--count[0] is count[0]
count[0]_p1_out = clr & A1L74 & !count[0];
count[0]_p3_out = clr & !count[0] & A1L05;
count[0]_p4_out = clr & !A1L74 & count[0] & !A1L05 & G;
count[0]_or_out = count[0]_p1_out # count[0]_p3_out # count[0]_p4_out;
count[0]_reg_input = count[0]_or_out;
count[0] = DFFE(count[0]_reg_input, GLOBAL(CLK), !reset, , );


--A1L75 is rtl~560
A1L75 = EXP(!A1L74 & !A1L05);


--count[1] is count[1]
count[1]_p0_out = clr & count[0] & !count[1] & A1L05;
count[1]_p1_out = A1L74 & clr & count[0] & !count[1];
count[1]_p4_out = A1L74 & clr & !count[0] & count[1];
count[1]_or_out = A1L56 # count[1]_p0_out # count[1]_p1_out # count[1]_p4_out;
count[1]_reg_input = count[1]_or_out;
count[1] = DFFE(count[1]_reg_input, GLOBAL(CLK), !reset, , A1L85);


--A1L85 is rtl~566
A1L85 = EXP(G & clr & !A1L74 & !A1L05);


--A1L95 is rtl~567
A1L95 = EXP(count[0] & count[1]);


--count[2] is count[2]
count[2]_p1_out = A1L75 & clr & !count[2] & count[0] & count[1];
count[2]_p4_out = A1L75 & clr & count[2] & A1L95;
count[2]_or_out = count[2]_p1_out # count[2]_p4_out;
count[2]_reg_input = count[2]_or_out;
count[2] = DFFE(count[2]_reg_input, GLOBAL(CLK), !reset, , A1L85);


--A1L53 is Q[0]~211
A1L53_p1_out = !reset & Din[0] & A1L43;
A1L53_p2_out = A1L53 & !reset & !OE;
A1L53_p3_out = A1L53 & !reset & Din[0];
A1L53_or_out = A1L53_p1_out # A1L53_p2_out # A1L53_p3_out;
A1L53 = A1L53_or_out;


--A1L63 is Q[1]~215
A1L63_p1_out = A1L43 & !reset & Din[1];
A1L63_p2_out = A1L63 & !reset & !OE;
A1L63_p3_out = A1L63 & !reset & Din[1];
A1L63_or_out = A1L63_p1_out # A1L63_p2_out # A1L63_p3_out;
A1L63 = A1L63_or_out;


--A1L93 is Q[4]~219
A1L93_p1_out = A1L43 & !reset & Din[4];
A1L93_p2_out = A1L93 & !reset & !OE;
A1L93_p3_out = A1L93 & !reset & Din[4];
A1L93_or_out = A1L93_p1_out # A1L93_p2_out # A1L93_p3_out;
A1L93 = A1L93_or_out;


--A1L73 is Q[2]~223
A1L73_p1_out = A1L43 & !reset & Din[2];
A1L73_p2_out = A1L73 & !reset & !OE;
A1L73_p3_out = A1L73 & !reset & Din[2];
A1L73_or_out = A1L73_p1_out # A1L73_p2_out # A1L73_p3_out;
A1L73 = A1L73_or_out;


--A1L83 is Q[3]~227
A1L83_p1_out = A1L43 & !reset & Din[3];
A1L83_p2_out = A1L83 & !reset & !OE;
A1L83_p3_out = A1L83 & !reset & Din[3];
A1L83_or_out = A1L83_p1_out # A1L83_p2_out # A1L83_p3_out;
A1L83 = A1L83_or_out;


--A1L04 is Q[5]~231
A1L04_p1_out = A1L43 & !reset & Din[5];
A1L04_p2_out = A1L04 & !reset & !OE;
A1L04_p3_out = A1L04 & !reset & Din[5];
A1L04_or_out = A1L04_p1_out # A1L04_p2_out # A1L04_p3_out;
A1L04 = A1L04_or_out;


--A1L14 is Q[6]~235
A1L14_p1_out = A1L43 & !reset & Din[6];
A1L14_p2_out = A1L14 & !reset & !OE;
A1L14_p3_out = A1L14 & !reset & Din[6];
A1L14_or_out = A1L14_p1_out # A1L14_p2_out # A1L14_p3_out;
A1L14 = A1L14_or_out;


--A1L24 is Q[7]~239
A1L24_p1_out = A1L43 & !reset & Din[7];
A1L24_p2_out = A1L24 & !reset & !OE;
A1L24_p3_out = A1L24 & !reset & Din[7];
A1L24_or_out = A1L24_p1_out # A1L24_p2_out # A1L24_p3_out;
A1L24 = A1L24_or_out;


--A1L06 is rtl~575
A1L06 = EXP(count[2] & count[0] & count[1]);


--count[3] is count[3]
count[3]_p1_out = A1L75 & clr & !count[3] & count[2] & count[0] & count[1];
count[3]_p4_out = A1L75 & clr & count[3] & A1L06;
count[3]_or_out = count[3]_p1_out # count[3]_p4_out;
count[3]_reg_input = count[3]_or_out;
count[3] = DFFE(count[3]_reg_input, GLOBAL(CLK), !reset, , A1L85);


--A1L16 is rtl~583
A1L16 = EXP(count[3] & count[2] & count[0] & count[1]);


--count[4] is count[4]
count[4]_p1_out = A1L75 & clr & !count[4] & count[3] & count[2] & count[0] & count[1];
count[4]_p4_out = A1L75 & clr & count[4] & A1L16;
count[4]_or_out = count[4]_p1_out # count[4]_p4_out;
count[4]_reg_input = count[4]_or_out;
count[4] = DFFE(count[4]_reg_input, GLOBAL(CLK), !reset, , A1L85);


--A1L26 is rtl~591
A1L26 = EXP(count[4] & count[3] & count[2] & count[0] & count[1]);


--count[5] is count[5]
count[5]_p1_out = A1L75 & clr & !count[5] & count[4] & count[3] & count[2] & count[0] & count[1];
count[5]_p4_out = A1L75 & clr & count[5] & A1L26;
count[5]_or_out = count[5]_p1_out # count[5]_p4_out;
count[5]_reg_input = count[5]_or_out;
count[5] = DFFE(count[5]_reg_input, GLOBAL(CLK), !reset, , A1L85);


--A1L36 is rtl~599
A1L36 = EXP(count[5] & count[4] & count[3] & count[2] & count[0] & count[1]);


--count[6] is count[6]
count[6]_p1_out = A1L75 & clr & !count[6] & count[5] & count[4] & count[3] & count[2] & count[0] & count[1];
count[6]_p4_out = A1L75 & clr & count[6] & A1L36;
count[6]_or_out = count[6]_p1_out # count[6]_p4_out;
count[6]_reg_input = count[6]_or_out;
count[6] = DFFE(count[6]_reg_input, GLOBAL(CLK), !reset, , A1L85);


--A1L46 is rtl~607
A1L46 = EXP(count[6] & count[5] & count[4] & count[3] & count[2] & count[0] & count[1]);


--count[7] is count[7]
count[7]_p1_out = A1L75 & clr & !count[7] & count[6] & count[5] & count[4] & count[3] & count[2] & count[0] & count[1];
count[7]_p4_out = A1L75 & clr & count[7] & A1L46;
count[7]_or_out = count[7]_p1_out # count[7]_p4_out;
count[7]_reg_input = count[7]_or_out;
count[7] = DFFE(count[7]_reg_input, GLOBAL(CLK), !reset, , A1L85);


--CP_Q is CP_Q
CP_Q_p1_out = !CP_Q & !G;
CP_Q_or_out = CP_Q_p1_out;
CP_Q_reg_input = CP_Q_or_out;
CP_Q_p3_out = !reset & clr & !A1L74 & !A1L05;
CP_Q = DFFE(CP_Q_reg_input, GLOBAL(CLK), , , CP_Q_p3_out);


--A1L2 is CK~18
A1L2_p1_out = CP_Q & NAB;
A1L2_or_out = A1L2_p1_out;
A1L2 = !(A1L2_or_out);


--D_Q is D_Q
D_Q_or_out = D;
D_Q_reg_input = D_Q_or_out;
D_Q = DFFE(D_Q_reg_input, A1L3, , , );


--A1L3 is CK~20
A1L3 = EXP(CP_Q & NAB);


--A1L81 is D_Q~6
A1L81_or_out = D_Q;
A1L81 = !(A1L81_or_out);


--A1L15 is reduce_nor~34
A1L15_p1_out = !A1L83 & !A1L93 & count[3] & !count[4];
A1L15 = A1L15_p1_out;


--A1L25 is reduce_nor~36
A1L25_p0_out = !A1L93 & count[4] & count[6] & A1L14 & !A1L04;
A1L25_p1_out = !A1L83 & !A1L73 & count[2] & !count[3];
A1L25_p2_out = !A1L83 & count[3] & A1L93 & count[4];
A1L25_p3_out = A1L83 & !A1L73 & count[2] & count[3];
A1L25_p4_out = !A1L93 & count[4] & !count[6] & !A1L14 & !A1L04;
A1L25 = A1L15 # A1L25_p0_out # A1L25_p1_out # A1L25_p2_out # A1L25_p3_out # A1L25_p4_out;


--A1L35 is reduce_nor~42
A1L35_p0_out = A1L44 & A1L83 & !count[3];
A1L35_p1_out = !A1L53 & !A1L63 & A1L73 & count[2];
A1L35_p2_out = !A1L53 & !A1L63 & !A1L73 & !count[2];
A1L35_p3_out = A1L34 & !count[6] & A1L14;
A1L35_p4_out = A1L34 & count[6] & !A1L14;
A1L35 = A1L25 # A1L35_p0_out # A1L35_p1_out # A1L35_p2_out # A1L35_p3_out # A1L35_p4_out;


--A1L45 is reduce_nor~48
A1L45_p1_out = count[0] & A1L53;
A1L45_p2_out = !count[0] & !A1L53;
A1L45_p3_out = !count[0] & A1L63 & !count[1];
A1L45_p4_out = !count[0] & !A1L63 & count[1];
A1L45 = A1L45_p1_out # A1L45_p2_out # A1L45_p3_out # A1L45_p4_out;


--A1L55 is reduce_nor~53
A1L55_p0_out = !A1L63 & count[1] & !count[5] & !A1L04 & !A1L83 & !A1L73 & !A1L93;
A1L55_p1_out = count[0] & !A1L63 & !count[1];
A1L55_p2_out = count[0] & A1L63 & count[1];
A1L55_p3_out = count[5] & !A1L04 & !count[7] & !A1L24 & !A1L14;
A1L55_p4_out = count[5] & !A1L04 & count[7] & A1L24 & !A1L14;
A1L55 = A1L45 # A1L55_p0_out # A1L55_p1_out # A1L55_p2_out # A1L55_p3_out # A1L55_p4_out;


--A1L43 is Q[0]$en_or~41sexp
A1L43 = EXP(!reset & !OE);


--A1L56 is rtl~617
A1L56_p1_out = A1L05 & clr & !count[0] & count[1];
A1L56 = A1L56_p1_out;


--NAB is NAB
--operation mode is input

NAB = INPUT();


--G is G
--operation mode is input

G = INPUT();


--CLK is CLK
--operation mode is input

CLK = INPUT();


--reset is reset
--operation mode is input

reset = INPUT();


--clr is clr
--operation mode is input

clr = INPUT();


--D is D
--operation mode is input

D = INPUT();


--Din[0] is Din[0]
--operation mode is input

Din[0] = INPUT();


--OE is OE
--operation mode is input

OE = INPUT();


--Din[1] is Din[1]
--operation mode is input

Din[1] = INPUT();


--Din[4] is Din[4]
--operation mode is input

Din[4] = INPUT();


--Din[2] is Din[2]
--operation mode is input

Din[2] = INPUT();


--Din[3] is Din[3]
--operation mode is input

Din[3] = INPUT();


--Din[5] is Din[5]
--operation mode is input

Din[5] = INPUT();


--Din[6] is Din[6]
--operation mode is input

Din[6] = INPUT();


--Din[7] is Din[7]
--operation mode is input

Din[7] = INPUT();


--NAA is NAA
--operation mode is output

NAA = OUTPUT(CP_Q);


--CK is CK
--operation mode is output

CK = OUTPUT(A1L2);


--DQ is DQ
--operation mode is output

DQ = OUTPUT(D_Q);


--NDQ is NDQ
--operation mode is output

NDQ = OUTPUT(A1L81);