muler.rpt

ＶＨＤＬ源程序


Project Information                     e:\temp\1k30_208_vhdl\demo21\muler.rpt

** FILE HIERARCHY **



|keyboard:1|
|keyboard:1|lpm_add_sub:72|
|keyboard:1|lpm_add_sub:72|addcore:adder|
|keyboard:1|lpm_add_sub:72|altshift:result_ext_latency_ffs|
|keyboard:1|lpm_add_sub:72|altshift:carry_ext_latency_ffs|
|keyboard:1|lpm_add_sub:72|altshift:oflow_ext_latency_ffs|
|keyboard:1|lpm_add_sub:375|
|keyboard:1|lpm_add_sub:375|addcore:adder|
|keyboard:1|lpm_add_sub:375|altshift:result_ext_latency_ffs|
|keyboard:1|lpm_add_sub:375|altshift:carry_ext_latency_ffs|
|keyboard:1|lpm_add_sub:375|altshift:oflow_ext_latency_ffs|
|sync:2|
|sync:2|lpm_add_sub:219|
|sync:2|lpm_add_sub:219|addcore:adder|
|sync:2|lpm_add_sub:219|altshift:result_ext_latency_ffs|
|sync:2|lpm_add_sub:219|altshift:carry_ext_latency_ffs|
|sync:2|lpm_add_sub:219|altshift:oflow_ext_latency_ffs|
|sync:2|lpm_add_sub:271|
|sync:2|lpm_add_sub:271|addcore:adder|
|sync:2|lpm_add_sub:271|altshift:result_ext_latency_ffs|
|sync:2|lpm_add_sub:271|altshift:carry_ext_latency_ffs|
|sync:2|lpm_add_sub:271|altshift:oflow_ext_latency_ffs|
|sync:2|lpm_add_sub:434|
|sync:2|lpm_add_sub:434|addcore:adder|
|sync:2|lpm_add_sub:434|altshift:result_ext_latency_ffs|
|sync:2|lpm_add_sub:434|altshift:carry_ext_latency_ffs|
|sync:2|lpm_add_sub:434|altshift:oflow_ext_latency_ffs|
|controler:6|
|controler:6|lpm_add_sub:124|
|controler:6|lpm_add_sub:124|addcore:adder|
|controler:6|lpm_add_sub:124|altshift:result_ext_latency_ffs|
|controler:6|lpm_add_sub:124|altshift:carry_ext_latency_ffs|
|controler:6|lpm_add_sub:124|altshift:oflow_ext_latency_ffs|
|controler:6|lpm_add_sub:278|
|controler:6|lpm_add_sub:278|addcore:adder|
|controler:6|lpm_add_sub:278|altshift:result_ext_latency_ffs|
|controler:6|lpm_add_sub:278|altshift:carry_ext_latency_ffs|
|controler:6|lpm_add_sub:278|altshift:oflow_ext_latency_ffs|
|controler:6|lpm_add_sub:520|
|controler:6|lpm_add_sub:520|addcore:adder|
|controler:6|lpm_add_sub:520|altshift:result_ext_latency_ffs|
|controler:6|lpm_add_sub:520|altshift:carry_ext_latency_ffs|
|controler:6|lpm_add_sub:520|altshift:oflow_ext_latency_ffs|
|disp:15|
|disp:15|lpm_add_sub:665|
|disp:15|lpm_add_sub:665|addcore:adder|
|disp:15|lpm_add_sub:665|altshift:result_ext_latency_ffs|
|disp:15|lpm_add_sub:665|altshift:carry_ext_latency_ffs|
|disp:15|lpm_add_sub:665|altshift:oflow_ext_latency_ffs|
|binbcd:18|
|binbcd:18|lpm_add_sub:2347|
|binbcd:18|lpm_add_sub:2347|addcore:adder|
|binbcd:18|lpm_add_sub:2347|altshift:result_ext_latency_ffs|
|binbcd:18|lpm_add_sub:2347|altshift:carry_ext_latency_ffs|
|binbcd:18|lpm_add_sub:2347|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|
|binbcd:18|divide:U1|lpm_add_sub:76|
|binbcd:18|divide:U1|lpm_add_sub:76|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:76|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:76|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:76|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:95|
|binbcd:18|divide:U1|lpm_add_sub:95|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:95|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:95|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:95|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:117|
|binbcd:18|divide:U1|lpm_add_sub:117|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:117|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:117|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:117|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:142|
|binbcd:18|divide:U1|lpm_add_sub:142|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:142|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:142|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:142|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:170|
|binbcd:18|divide:U1|lpm_add_sub:170|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:170|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:170|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:170|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:201|
|binbcd:18|divide:U1|lpm_add_sub:201|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:201|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:201|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:201|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:235|
|binbcd:18|divide:U1|lpm_add_sub:235|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:235|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:235|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:235|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:272|
|binbcd:18|divide:U1|lpm_add_sub:272|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:272|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:272|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:272|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:312|
|binbcd:18|divide:U1|lpm_add_sub:312|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:312|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:312|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:312|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:355|
|binbcd:18|divide:U1|lpm_add_sub:355|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:355|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:355|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:355|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:398|
|binbcd:18|divide:U1|lpm_add_sub:398|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:398|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:398|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:398|altshift:oflow_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:441|
|binbcd:18|divide:U1|lpm_add_sub:441|addcore:adder|
|binbcd:18|divide:U1|lpm_add_sub:441|altshift:result_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:441|altshift:carry_ext_latency_ffs|
|binbcd:18|divide:U1|lpm_add_sub:441|altshift:oflow_ext_latency_ffs|
|mul:19|
|contro1:24|
|contro1:24|lpm_add_sub:147|
|contro1:24|lpm_add_sub:147|addcore:adder|
|contro1:24|lpm_add_sub:147|altshift:result_ext_latency_ffs|
|contro1:24|lpm_add_sub:147|altshift:carry_ext_latency_ffs|
|contro1:24|lpm_add_sub:147|altshift:oflow_ext_latency_ffs|
|scandisp:38|
|scandisp:38|lpm_add_sub:76|
|scandisp:38|lpm_add_sub:76|addcore:adder|
|scandisp:38|lpm_add_sub:76|altshift:result_ext_latency_ffs|
|scandisp:38|lpm_add_sub:76|altshift:carry_ext_latency_ffs|
|scandisp:38|lpm_add_sub:76|altshift:oflow_ext_latency_ffs|
|multiply:47|
|multiply:47|lpm_mult:U1|
|multiply:47|lpm_mult:U1|multcore:mult_core|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|muleabz:lookup_table0|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|muleabz:lookup_table0|muleabz:multer|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|muleabz:lookup_table0|muleabz:multer|impl_eab:multer|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|muleabz:lookup_table0|muleabz:multer|impl_eab:multer|altrom:eab|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|muleabz:last_lookup_table|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|muleabz:last_lookup_table|muleabz:multer|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|muleabz:last_lookup_table|muleabz:multer|impl_eab:multer|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|muleabz:last_lookup_table|muleabz:multer|impl_eab:multer|altrom:eab|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|mpar_add:par_adder2|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|mpar_add:par_adder2|lpm_add_sub:adder0|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|mpar_add:par_adder2|lpm_add_sub:adder0|addcore:adder|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|mpar_add:par_adder2|lpm_add_sub:adder0|altshift:result_ext_latency_ffs|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|mpar_add:par_adder2|lpm_add_sub:adder0|altshift:carry_ext_latency_ffs|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:multer0|mpar_add:par_adder2|lpm_add_sub:adder0|altshift:oflow_ext_latency_ffs|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:last_multer|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:last_multer|muleabz:multer|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:last_multer|muleabz:multer|impl_eab:multer|
|multiply:47|lpm_mult:U1|multcore:mult_core|muleabz:last_multer|muleabz:multer|impl_eab:multer|altrom:eab|
|multiply:47|lpm_mult:U1|multcore:mult_core|mpar_add:par_adder|
|multiply:47|lpm_mult:U1|multcore:mult_core|mpar_add:par_adder|lpm_add_sub:adder0|
|multiply:47|lpm_mult:U1|multcore:mult_core|mpar_add:par_adder|lpm_add_sub:adder0|addcore:adder|
|multiply:47|lpm_mult:U1|multcore:mult_core|mpar_add:par_adder|lpm_add_sub:adder0|altshift:result_ext_latency_ffs|
|multiply:47|lpm_mult:U1|multcore:mult_core|mpar_add:par_adder|lpm_add_sub:adder0|altshift:carry_ext_latency_ffs|
|multiply:47|lpm_mult:U1|multcore:mult_core|mpar_add:par_adder|lpm_add_sub:adder0|altshift:oflow_ext_latency_ffs|
|multiply:47|lpm_mult:U1|altshift:external_latency_ffs|
|adeled:49|
|74244:59|


Device-Specific Information:            e:\temp\1k30_208_vhdl\demo21\muler.rpt
muler

***** Logic for device 'muler' compiled without errors.