mux2.edf

来自「设计与验证verilog hdl」· EDF 代码 · 共 107 行

(edif (rename mux2 "mux")
  (edifVersion 2 0 0)
  (edifLevel 0)
  (keywordMap (keywordLevel 0))
  (status
    (written
      (timeStamp 2006 1 10 23 31 45)
      (author "Synplicity, Inc.")
      (program "Synplify Pro" (version "8.1.0, Build 540R"))
     )
   )
  (library VIRTEX
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell IBUF (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port O (direction OUTPUT))
           (port I (direction INPUT))
         )
       )
    )
    (cell OBUF (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port O (direction OUTPUT))
           (port I (direction INPUT))
         )
       )
    )
    (cell LUT3 (cellType GENERIC)
       (view PRIM (viewType NETLIST)
         (interface
           (port I0 (direction INPUT))
           (port I1 (direction INPUT))
           (port I2 (direction INPUT))
           (port O (direction OUTPUT))
         )
       )
    )
  )
  (library work
    (edifLevel 0)
    (technology (numberDefinition ))
    (cell (rename mux2 "mux") (cellType GENERIC)
       (view verilog (viewType NETLIST)
         (interface
           (port en (direction INPUT)
 )
           (port a (direction INPUT)
 )
           (port b (direction INPUT)
 )
           (port mux_out (direction OUTPUT))
         )
         (contents
          (instance (rename mux_outZ0 "mux_out") (viewRef PRIM (cellRef LUT3 (libraryRef VIRTEX)))
           (property init (string "AC"))
          )
          (instance mux_out_obuf (viewRef PRIM (cellRef OBUF (libraryRef VIRTEX)))
          )
          (instance b_ibuf (viewRef PRIM (cellRef IBUF (libraryRef VIRTEX)))
          )
          (instance a_ibuf (viewRef PRIM (cellRef IBUF (libraryRef VIRTEX)))
          )
          (instance en_ibuf (viewRef PRIM (cellRef IBUF (libraryRef VIRTEX)))
          )
          (net en (joined
           (portRef en)
           (portRef I (instanceRef en_ibuf))
          ))
          (net a (joined
           (portRef a)
           (portRef I (instanceRef a_ibuf))
          ))
          (net b (joined
           (portRef b)
           (portRef I (instanceRef b_ibuf))
          ))
          (net mux_out (joined
           (portRef O (instanceRef mux_out_obuf))
           (portRef mux_out)
          ))
          (net a_c (joined
           (portRef O (instanceRef a_ibuf))
           (portRef I0 (instanceRef mux_outZ0))
          ))
          (net b_c (joined
           (portRef O (instanceRef b_ibuf))
           (portRef I1 (instanceRef mux_outZ0))
          ))
          (net en_c (joined
           (portRef O (instanceRef en_ibuf))
           (portRef I2 (instanceRef mux_outZ0))
          ))
          (net mux_out_c (joined
           (portRef O (instanceRef mux_outZ0))
           (portRef I (instanceRef mux_out_obuf))
          ))
         )
       )
    )
  )
  (design (rename mux2 "mux") (cellRef mux2 (libraryRef work))
	(property PART (string "xc3s50tq144-4") (owner "Xilinx")))
)