analyzer.ph0

可编程器件厂商Xilinx的手持式逻辑分析仪的逻辑设计

 	CNT_DWN12  node istype 'reg, collapse';  " 2 pt.
 	CNT_DWN2  node istype 'reg, collapse';  " 2 pt.
 	CNT_DWN3  node istype 'reg, collapse';  " 2 pt.
 	CNT_DWN4  node istype 'reg, collapse';  " 2 pt.
 	CNT_DWN5  node istype 'reg, collapse';  " 2 pt.
 	CNT_DWN6  node istype 'reg, collapse';  " 2 pt.
 	CNT_DWN7  node istype 'reg, collapse';  " 2 pt.
 	CNT_DWN8  node istype 'reg, collapse';  " 2 pt.
 	CNT_DWN9  node istype 'reg, collapse';  " 2 pt.
 	DATA_BUS/MEM_RD0  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD1  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD10  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD11  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD12  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD13  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD14  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD15  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD2  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD3  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD4  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD5  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD6  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD7  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD8  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_RD9  node istype 'collapse';  " 1 pt.
 	DATA_BUS/MEM_WD0  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD1  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD10  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD11  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD12  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD13  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD14  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD15  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD2  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD3  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD4  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD5  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD6  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD7  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD8  node istype 'collapse';  " 2 pt.
 	DATA_BUS/MEM_WD9  node istype 'collapse';  " 2 pt.
 	DATA_BUS/N32762  node istype 'collapse';  " 1 pt.
 	DATA_BUS/N34481  node istype 'collapse';  " 1 pt.
 	DATA_BUS/N50652  node istype 'collapse';  " 1 pt.
 	DATA_BUS/N511272  node istype 'collapse';  " 1 pt.
 	DATA_BUS/N51332  node istype 'collapse';  " 1 pt.
 	DATA_BUS/N51515  node istype 'collapse';  " 1 pt.
 	DATA_BUS/READ_ENABLE  node istype 'collapse';  " 1 pt.
 	DATA_BUS/SB_RD0  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD1  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD10  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD11  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD12  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD13  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD14  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD15  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD2  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD3  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD4  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD5  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD6  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD7  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD8  node istype 'collapse';  " 2 pt.
 	DATA_BUS/SB_RD9  node istype 'collapse';  " 2 pt.
 	DATA_BUS/WRITE_ENABLE  node istype 'collapse';  " 1 pt.
 	GOT_TRIG  node istype 'reg, collapse';  " 1 pt.
 	IN_STATUS0  node istype 'reg, collapse';  " 1 pt.
 	IN_STATUS1  node istype 'reg, collapse';  " 1 pt.
 	IN_STATUS2  node istype 'reg, collapse';  " 1 pt.
 	IN_STATUS3  node istype 'reg, collapse';  " 1 pt.
 	IN_STATUS4  node istype 'reg, collapse';  " 1 pt.
 	IN_STATUS5  node istype 'reg, collapse';  " 1 pt.
 	IN_STATUS6  node istype 'reg, collapse';  " 1 pt.
 	IN_STATUS7  node istype 'reg, collapse';  " 1 pt.
 	INPUT_HILO  node istype 'reg, collapse';  " 2 pt.
 	N66744  node istype 'collapse';  " 1 pt.
 	RAM_A0  node istype 'reg, collapse';  " 3 pt.
 	RAM_A1  node istype 'reg, collapse';  " 4 pt.
 	RAM_A10  node istype 'reg, collapse';  " 13 pt.
 	RAM_A11  node istype 'reg, collapse';  " 14 pt.
 	RAM_A12  node istype 'reg, collapse';  " 15 pt.
 	RAM_A13  node istype 'collapse';  " 1 pt.
 	RAM_A14  node istype 'collapse';  " 1 pt.
 	RAM_A15  node istype 'collapse';  " 1 pt.
 	RAM_A16  node istype 'collapse';  " 1 pt.
 	RAM_A17  node istype 'collapse';  " 1 pt.
 	RAM_A2  node istype 'reg, collapse';  " 5 pt.
 	RAM_A3  node istype 'reg, collapse';  " 6 pt.
 	RAM_A4  node istype 'reg, collapse';  " 7 pt.
 	RAM_A5  node istype 'reg, collapse';  " 8 pt.
 	RAM_A6  node istype 'reg, collapse';  " 9 pt.
 	RAM_A7  node istype 'reg, collapse';  " 10 pt.
 	RAM_A8  node istype 'reg, collapse';  " 11 pt.
 	RAM_A9  node istype 'reg, collapse';  " 12 pt.
 	RAM_D0  node istype 'reg, collapse';  " 2 pt.
 	RAM_D1  node istype 'reg, collapse';  " 2 pt.
 	RAM_D10  node istype 'reg, collapse';  " 2 pt.
 	RAM_D11  node istype 'reg, collapse';  " 2 pt.
 	RAM_D12  node istype 'reg, collapse';  " 2 pt.
 	RAM_D13  node istype 'reg, collapse';  " 2 pt.
 	RAM_D14  node istype 'reg, collapse';  " 2 pt.
 	RAM_D15  node istype 'reg, collapse';  " 2 pt.
 	RAM_D2  node istype 'reg, collapse';  " 2 pt.
 	RAM_D3  node istype 'reg, collapse';  " 2 pt.
 	RAM_D4  node istype 'reg, collapse';  " 2 pt.
 	RAM_D5  node istype 'reg, collapse';  " 2 pt.
 	RAM_D6  node istype 'reg, collapse';  " 2 pt.
 	RAM_D7  node istype 'reg, collapse';  " 2 pt.
 	RAM_D8  node istype 'reg, collapse';  " 2 pt.
 	RAM_D9  node istype 'reg, collapse';  " 2 pt.
 	REG2_CS  node istype 'collapse';  " 1 pt.
 	REG_RD0  node istype 'collapse';  " 2 pt.
 	REG_RD1  node istype 'collapse';  " 2 pt.
 	REG_RD10  node istype 'collapse';  " 2 pt.
 	REG_RD11  node istype 'collapse';  " 2 pt.
 	REG_RD12  node istype 'collapse';  " 2 pt.
 	REG_RD13  node istype 'collapse';  " 2 pt.
 	REG_RD14  node istype 'collapse';  " 2 pt.
 	REG_RD15  node istype 'collapse';  " 2 pt.
 	REG_RD2  node istype 'collapse';  " 2 pt.
 	REG_RD3  node istype 'collapse';  " 2 pt.
 	REG_RD4  node istype 'collapse';  " 2 pt.
 	REG_RD5  node istype 'collapse';  " 2 pt.
 	REG_RD6  node istype 'collapse';  " 2 pt.
 	REG_RD7  node istype 'collapse';  " 2 pt.
 	REG_RD8  node istype 'collapse';  " 2 pt.
 	REG_RD9  node istype 'collapse';  " 2 pt.
 	REG_SEL  node istype 'collapse';  " 1 pt.
 	REGISTERS/N50598  node istype 'collapse';  " 1 pt.
 	REGISTERS/REG0_CS  node istype 'collapse';  " 1 pt.
 	REGISTERS/REG4_CS  node istype 'collapse';  " 1 pt.
 	REGISTERS/REG6_CS  node istype 'collapse';  " 1 pt.
 	REGISTERS/REG_READSEL/N197429  node istype 'collapse';  " 0 pt.
 	REGISTERS/REG_READSEL/N197470  node istype 'collapse';  " 0 pt.
 	REGISTERS/RREG0/xpla_dummy_o_16  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_17  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_18  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_19  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_20  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_21  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_22  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_23  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_24  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_25  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_26  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_27  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_28  node istype 'collapse';  " 1 pt.
 	REGISTERS/RREG0/xpla_dummy_o_29  node istype 'collapse';  " 1 pt.
 	REGISTERS/SP_A1N  node istype 'collapse';  " 1 pt.
 	REGISTERS/SP_A2N  node istype 'collapse';  " 1 pt.
 	REGISTERS/SP_A3N  node istype 'collapse';  " 1 pt.
 	REGISTERS/SP_A4N  node istype 'collapse';  " 1 pt.
 	REGISTERS/TRIG_HILO  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD0  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD1  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD10  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD11  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD12  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD2  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD3  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD4  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD5  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD6  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD7  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD8  node istype 'reg';  " 1 pt.
 	REGISTERS/TRIGADR_RD9  node istype 'reg';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_46  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_47  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_48  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_49  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_50  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_51  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_52  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_53  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_54  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_55  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_56  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_57  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_58  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_59  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_60  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG0/xpla_dummy_o_61  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_30  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_31  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_32  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_33  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_34  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_35  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_36  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_37  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_38  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_39  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_40  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_41  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_42  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_43  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_44  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG4/xpla_dummy_o_45  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_62  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_63  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_64  node istype 'reg';  " 2 pt.
 	REGISTERS/WREG6/xpla_dummy_o_65  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_66  node istype 'reg';  " 2 pt.
 	REGISTERS/WREG6/xpla_dummy_o_67  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_68  node istype 'reg';  " 2 pt.
 	REGISTERS/WREG6/xpla_dummy_o_69  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_70  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_71  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_72  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_73  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_74  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_75  node istype 'collapse';  " 1 pt.
 	REGISTERS/WREG6/xpla_dummy_o_76  node istype 'collapse';  " 1 pt.
 	RUN  node istype 'reg, collapse';  " 2 pt.
 	SB_WD0  node istype 'collapse';  " 1 pt.
 	SB_WD1  node istype 'collapse';  " 1 pt.
 	SB_WD10  node istype 'collapse';  " 1 pt.
 	SB_WD11  node istype 'collapse';  " 1 pt.
 	SB_WD12  node istype 'collapse';  " 1 pt.
 	SB_WD13  node istype 'collapse';  " 1 pt.
 	SB_WD14  node istype 'collapse';  " 1 pt.
 	SB_WD15  node istype 'collapse';  " 1 pt.
 	SB_WD2  node istype 'collapse';  " 1 pt.
 	SB_WD3  node istype 'collapse';  " 1 pt.
 	SB_WD4  node istype 'collapse';  " 1 pt.
 	SB_WD5  node istype 'collapse';  " 1 pt.
 	SB_WD6  node istype 'collapse';  " 1 pt.
 	SB_WD7  node istype 'collapse';  " 1 pt.
 	SB_WD8  node istype 'collapse';  " 1 pt.
 	SB_WD9  node istype 'collapse';  " 1 pt.
 	SELCLK0  node istype 'reg, collapse';  " 2 pt.
 	SELCLK1  node istype 'reg, collapse';  " 2 pt.
 	SELCLK2  node istype 'reg, collapse';  " 2 pt.
 	SP_CS0  node istype 'collapse';  " 1 pt.
 	SP_CS1  node istype 'collapse';  " 1 pt.
 	SP_IRQ  node istype 'collapse';  " 0 pt.
 	SP_OE  node istype 'collapse';  " 1 pt.
 	SP_WE  node istype 'collapse';  " 1 pt.
 	SRAM_LOW_BYTEN  node K3 istype 'collapse';  " 0 pt.
 	STOP  node istype 'collapse';  " 1 pt.
 	TRIGADR_WR0  node istype 'collapse';  " 1 pt.
 	TRIGADR_WR1  node istype 'collapse';  " 1 pt.
 	TRIGADR_WR10  node istype 'collapse';  " 1 pt.
 	TRIGADR_WR11  node istype 'collapse';  " 1 pt.
 	TRIGADR_WR12  node istype 'collapse';  " 1 pt.
 	TRIGADR_WR2  node istype 'collapse';  " 1 pt.
 	TRIGADR_WR3  node istype 'collapse';  " 1 pt.