📄 analyzer.ph0
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" XPLAOPT Version 3.43
" Created on Mon Aug 13 22:36:55 2001
" 434 Mcells, 32 FbNand, 977 PLApts, 8 Levels
" XPLAOPT -dev xcr3256xl-10cs280 -mode 1 -th 18 -fi 26 -xor n -reg -ucf
" c:\dad'sstuff\visor\logicanalyzer\analyzer\analyzer.ucf -it blif -i analyzer.bl3 -ot blif -o analyzer.blx -run s -log
" analyzer.er2 -ctrl analyzer.ctrl
MODULE LogicAnalyzer
A0 pin T5 ; " 2 pt.
A1 pin W10 ; " 2 pt.
A10 pin V5 ; " 2 pt.
A11 pin W5 ; " 2 pt.
A12 pin W4 ; " 2 pt.
A13 pin W3 ; " 2 pt.
A14 pin U6 ; " 2 pt.
A15 pin T6 ; " 2 pt.
A16 pin R6 ; " 2 pt.
A17 pin W7 ; " 2 pt.
A18 pin G1 ; " 1 pt.
A19 pin U5 ; " 1 pt.
A2 pin T9 ; " 2 pt.
A20 pin U4 ; " 1 pt.
A3 pin U9 ; " 2 pt.
A4 pin T8 ; " 2 pt.
A5 pin V7 ; " 2 pt.
A6 pin U7 ; " 2 pt.
A7 pin T7 ; " 2 pt.
A8 pin V6 ; " 2 pt.
A9 pin W6 ; " 2 pt.
CH_IN0 pin B1 ;
CH_IN1 pin C3 ;
CH_IN2 pin A4 ;
CH_IN3 pin B5 ;
CH_IN4 pin C5 ;
CH_IN5 pin A5 ;
CH_IN6 pin E6 ;
CH_IN7 pin D6 ;
D0 pin A14 ; " 1 pt.
D1 pin B13 ; " 1 pt.
D10 pin B12 ; " 1 pt.
D11 pin D10 ; " 1 pt.
D12 pin C9 ; " 1 pt.
D13 pin B8 ; " 1 pt.
D14 pin C7 ; " 1 pt.
D15 pin B7 ; " 1 pt.
D2 pin D12 ; " 1 pt.
D3 pin A12 ; " 1 pt.
D4 pin C10 ; " 1 pt.
D5 pin C8 ; " 1 pt.
D6 pin D7 ; " 1 pt.
D7 pin A7 ; " 1 pt.
D8 pin C13 ; " 1 pt.
D9 pin A13 ; " 1 pt.
FLASH_CS0n pin E14 ; " 1 pt.
FLASH_W_PROTECTn pin H2 ; " 1 pt.
IO13 pin E2 ; " 1 pt.
IO14 pin E4 ; " 1 pt.
IO15 pin E1 ; " 1 pt.
LED_0 pin F5 ; " 1 pt.
LED_1 pin F3 ; " 1 pt.
LED_2 pin F4 ; " 1 pt.
LED_3 pin G3 ; " 1 pt.
OEn pin D14 ; " 2 pt.
RESET_MEMn pin T13 ; " 1 pt.
RWn pin J2 ; " 2 pt.
SP_A1 pin T17 ;
SP_A10 pin F17 ;
SP_A11 pin H17 ;
SP_A12 pin M18 ;
SP_A13 pin L17 ;
SP_A14 pin E18 ;
SP_A15 pin K18 ;
SP_A16 pin H19 ;
SP_A17 pin L16 ;
SP_A18 pin M17 ;
SP_A19 pin E19 ;
SP_A2 pin R16 ;
SP_A20 pin F19 ;
SP_A21 pin H18 ;
SP_A3 pin R17 ;
SP_A4 pin N16 ;
SP_A5 pin M16 ;
SP_A6 pin R19 ;
SP_A7 pin N18 ;
SP_A8 pin K17 ;
SP_A9 pin J17 ;
SP_CS0n pin B19 ;
SP_CS1n pin G16 ;
SP_D0 pin V16 ; " 1 pt.
SP_D1 pin W15 ; " 1 pt.
SP_D10 pin U15 ; " 1 pt.
SP_D11 pin C16 ; " 1 pt.
SP_D12 pin A16 ; " 1 pt.
SP_D13 pin B17 ; " 1 pt.
SP_D14 pin B18 ; " 1 pt.
SP_D15 pin F15 ; " 1 pt.
SP_D2 pin T15 ; " 1 pt.
SP_D3 pin D15 ; " 1 pt.
SP_D4 pin E15 ; " 1 pt.
SP_D5 pin A15 ; " 1 pt.
SP_D6 pin A17 ; " 1 pt.
SP_D7 pin A18 ; " 1 pt.
SP_D8 pin V15 ; " 1 pt.
SP_D9 pin T16 ; " 1 pt.
SP_IRQn pin G19 ; " 1 pt.
SP_OEn pin G17 ;
SP_RESETn pin N17 ;
SP_WEn pin F18 ;
SRAM_CS1n pin K2 ; " 2 pt.
SRAM_LOW_BYTEn pin K3 ; " 1 pt.
SRAM_UPPER_BYTEn pin J3 ; " 1 pt.
SYS_CLK pin A10 ;
ACQ_CONTROL/ACQ_BEGIN node istype 'reg'; " 1 pt.
ACQ_CONTROL/ACQ_CNT1/N71119 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_CNT1/N71237 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_CNT1/N72307 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_CNT1/N95948 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_CNT1/QA node istype 'reg'; " 1 pt.
ACQ_CONTROL/ACQ_CNT1/xpla_dummy_o_0 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_CNT1/xpla_dummy_o_1 node istype 'reg'; " 1 pt.
ACQ_CONTROL/ACQ_CNT1/xpla_dummy_o_2 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/IN0 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/IN1 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/IN2 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/IN3 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/IN4 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/IN5 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/IN6 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/IN7 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N128544 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N135510 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N135532 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N135837 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N135849 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136235 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136247 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136271 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136283 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136428 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136440 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136464 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136476 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136500 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136512 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136516 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N136524 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N161259 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/N161559 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/ACQ_DATA_CTL/T0 node istype 'collapse'; " 4 pt.
ACQ_CONTROL/ACQ_DATA_CTL/T1 node istype 'collapse'; " 4 pt.
ACQ_CONTROL/ACQ_DATA_CTL/T2 node istype 'collapse'; " 4 pt.
ACQ_CONTROL/ACQ_DATA_CTL/T3 node istype 'collapse'; " 4 pt.
ACQ_CONTROL/ACQ_DATA_CTL/T4 node istype 'collapse'; " 4 pt.
ACQ_CONTROL/ACQ_DATA_CTL/T5 node istype 'collapse'; " 4 pt.
ACQ_CONTROL/ACQ_DATA_CTL/T6 node istype 'collapse'; " 4 pt.
ACQ_CONTROL/ACQ_DATA_CTL/T7 node istype 'collapse'; " 4 pt.
ACQ_CONTROL/CNTB16DL/XPLA_PZ_11 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/CNTB16DL/XPLA_PZ_27 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/N131094 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/N133018 node istype 'reg'; " 8 pt.
ACQ_CONTROL/N133020 node istype 'reg'; " 7 pt.
ACQ_CONTROL/N133022 node istype 'reg'; " 6 pt.
ACQ_CONTROL/N133024 node istype 'reg'; " 5 pt.
ACQ_CONTROL/N133026 node istype 'reg'; " 4 pt.
ACQ_CONTROL/N133028 node istype 'reg'; " 3 pt.
ACQ_CONTROL/N133030 node istype 'reg'; " 2 pt.
ACQ_CONTROL/N133058 node istype 'reg'; " 11 pt.
ACQ_CONTROL/N133060 node istype 'reg'; " 10 pt.
ACQ_CONTROL/N133062 node istype 'reg'; " 9 pt.
ACQ_CONTROL/N136978 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/N139394 node istype 'reg'; " 12 pt.
ACQ_CONTROL/N139401 node istype 'reg'; " 13 pt.
ACQ_CONTROL/N139441 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/N139448 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/N160724 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/N177828 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/N177842 node istype 'collapse'; " 16 pt.
ACQ_CONTROL/N182139 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/N182142 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/N183049 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPL_CLK node istype 'collapse'; " 2 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/CNTB16DLRE/XPLA_PZ_11 node istype 'collapse';
" 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/CNTB16DLRE/XPLA_PZ_27 node istype 'collapse';
" 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/DWN_CLK node istype 'collapse'; " 4 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/DWN_OUT node istype 'reg'; " 2 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N124061 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N125972 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N125990 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133018 node istype 'reg'; " 9 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133020 node istype 'reg'; " 8 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133022 node istype 'reg'; " 7 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133024 node istype 'reg'; " 6 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133026 node istype 'reg'; " 5 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133028 node istype 'reg'; " 4 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133030 node istype 'reg'; " 3 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133052 node istype 'reg'; " 6 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133054 node istype 'reg'; " 14 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133056 node istype 'reg'; " 13 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133058 node istype 'reg'; " 12 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133060 node istype 'reg'; " 11 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133062 node istype 'reg'; " 10 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133079 node istype 'collapse'; " 0 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N1331745 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133197 node istype 'reg'; " 8 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133212 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133215 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133234 node istype 'reg'; " 7 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133409 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N133441 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/N136442 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/SYS_CLK2 node istype 'reg'; " 2 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/SYS_CLK4 node istype 'reg'; " 2 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/xpla_dummy_o_3 node istype 'reg'; " 10 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/xpla_dummy_o_4 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/XPLANOT__SYS_CLK2 node istype 'collapse';
" 1 pt.
ACQ_CONTROL/SAMPLE_CLK_GEN/XPLANOT__SYS_CLK4 node istype 'collapse';
" 1 pt.
ACQ_CONTROL/STOP node istype 'collapse'; " 1 pt.
ACQ_CONTROL/xpla_dummy_o_10 node istype 'reg'; " 9 pt.
ACQ_CONTROL/xpla_dummy_o_11 node istype 'reg'; " 16 pt.
ACQ_CONTROL/xpla_dummy_o_12 node istype 'reg'; " 17 pt.
ACQ_CONTROL/xpla_dummy_o_13 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/xpla_dummy_o_14 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/xpla_dummy_o_15 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/xpla_dummy_o_5 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/xpla_dummy_o_6 node istype 'collapse'; " 1 pt.
ACQ_CONTROL/xpla_dummy_o_7 node istype 'reg'; " 5 pt.
ACQ_CONTROL/xpla_dummy_o_8 node istype 'reg'; " 6 pt.
ACQ_CONTROL/xpla_dummy_o_9 node istype 'reg'; " 7 pt.
ACQ_RESET node istype 'collapse'; " 1 pt.
ACQ_WRN node istype 'collapse'; " 1 pt.
BANK0 node istype 'reg, collapse'; " 2 pt.
BANK1 node istype 'reg, collapse'; " 2 pt.
BANK2 node istype 'reg, collapse'; " 2 pt.
BANK3 node istype 'reg, collapse'; " 2 pt.
BANK4 node istype 'reg, collapse'; " 2 pt.
CLR_RUN node istype 'collapse'; " 1 pt.
CNT_DWN0 node istype 'reg, collapse'; " 2 pt.
CNT_DWN1 node istype 'reg, collapse'; " 2 pt.
CNT_DWN10 node istype 'reg, collapse'; " 2 pt.
CNT_DWN11 node istype 'reg, collapse'; " 2 pt.
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