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可编程器件厂商Xilinx的手持式逻辑分析仪的逻辑设计

D4           = RAM_D4.Q & IO14.Q
               # SP_D4.PIN & !IO14.Q;
!D4.OE       = N_PZ_5595; "GCT(FB2)
"********( D5 )*************************************************************
"PLA 2 pts
D5           = RAM_D5.Q & IO14.Q
               # !IO14.Q & SP_D5.PIN;
!D5.OE       = N_PZ_5595; "GCT(FB2)
"********( D6 )*************************************************************
"PLA 2 pts
D6           = RAM_D6.Q & IO14.Q
               # !IO14.Q & SP_D6.PIN;
!D6.OE       = N_PZ_5595; "GCT(FB2)
"********( D7 )*************************************************************
"PLA 2 pts
D7           = RAM_D7.Q & IO14.Q
               # !IO14.Q & SP_D7.PIN;
!D7.OE       = N_PZ_5595; "GCT(FB2)
"********( D8 )*************************************************************
"PLA 2 pts
D8           = RAM_D8.Q & IO14.Q
               # !IO14.Q & SP_D8.PIN;
!D8.OE       = N_PZ_5595; "GCT(FB2)
"********( D9 )*************************************************************
"PLA 2 pts
D9           = RAM_D9.Q & IO14.Q
               # !IO14.Q & SP_D9.PIN;
!D9.OE       = N_PZ_5595; "GCT(FB2)
"********( D_0_TRIGADR_RD0 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD0.D= RAM_A0.Q; "PT0
D_0_TRIGADR_RD0.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD0.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD1 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD1.D= RAM_A1.Q; "PT0
D_0_TRIGADR_RD1.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD1.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD10 )***********************************************
"PLA 1 pts
D_0_TRIGADR_RD10.D= RAM_A10.Q; "PT0
D_0_TRIGADR_RD10.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD10.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD11 )***********************************************
"PLA 1 pts
D_0_TRIGADR_RD11.D= RAM_A11.Q; "PT0
D_0_TRIGADR_RD11.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD11.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD12 )***********************************************
"PLA 1 pts
D_0_TRIGADR_RD12.D= RAM_A12.Q; "PT0
D_0_TRIGADR_RD12.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD12.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD2 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD2.D= RAM_A2.Q; "PT0
D_0_TRIGADR_RD2.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD2.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD3 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD3.D= RAM_A3.Q; "PT0
D_0_TRIGADR_RD3.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD3.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD4 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD4.D= RAM_A4.Q; "PT0
D_0_TRIGADR_RD4.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD4.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD5 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD5.D= RAM_A5.Q; "PT0
D_0_TRIGADR_RD5.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD5.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD6 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD6.D= RAM_A6.Q; "PT0
D_0_TRIGADR_RD6.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD6.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD7 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD7.D= RAM_A7.Q; "PT0
D_0_TRIGADR_RD7.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD7.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD8 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD8.D= RAM_A8.Q; "PT0
D_0_TRIGADR_RD8.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD8.C= IO13.Q; "BCT4
"********( D_0_TRIGADR_RD9 )************************************************
"PLA 1 pts
D_0_TRIGADR_RD9.D= RAM_A9.Q; "PT0
D_0_TRIGADR_RD9.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIGADR_RD9.C= IO13.Q; "BCT4
"********( D_0_TRIG_HILO )**************************************************
"PLA 1 pts
D_0_TRIG_HILO.D= INPUT_HILO.Q; "PT0
D_0_TRIG_HILO.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
D_0_TRIG_HILO.C= IO13.Q; "BCT4
"********( E_0_xpla_dummy_o_64 )********************************************
"PLA 2 pts
E_0_xpla_dummy_o_64.T= !E_0_xpla_dummy_o_64.Q & !SP_A3 & SP_D12.PIN 
               & SP_A1 & !SP_A4 & !SP_CS1n & SP_A2 & !SP_A19
               # E_0_xpla_dummy_o_64.Q & !SP_A3 & !SP_D12.PIN & SP_A1 
               & !SP_A4 & !SP_CS1n & SP_A2 & !SP_A19;
E_0_xpla_dummy_o_64.C= SP_WEn; "GCT(FB1)
"********( E_0_xpla_dummy_o_66 )********************************************
"PLA 2 pts
E_0_xpla_dummy_o_66.T= !SP_A19 & !SP_CS1n & !E_0_xpla_dummy_o_66.Q 
               & SP_D13.PIN & SP_A2 & SP_A1 & !SP_A3 & !SP_A4
               # !SP_A19 & !SP_CS1n & E_0_xpla_dummy_o_66.Q & !SP_D13.PIN 
               & SP_A2 & SP_A1 & !SP_A3 & !SP_A4;
E_0_xpla_dummy_o_66.C= SP_WEn; "GCT(FB1)
"********( E_0_xpla_dummy_o_68 )********************************************
"PLA 2 pts
E_0_xpla_dummy_o_68.T= !SP_A19 & !SP_CS1n & SP_A2 & !E_0_xpla_dummy_o_68.Q 
               & SP_D14.PIN & SP_A1 & !SP_A3 & !SP_A4
               # !SP_A19 & !SP_CS1n & SP_A2 & E_0_xpla_dummy_o_68.Q 
               & !SP_D14.PIN & SP_A1 & !SP_A3 & !SP_A4;
E_0_xpla_dummy_o_68.C= SP_WEn; "GCT(FB1)
"********( FLASH_CS0n )*****************************************************
"PLA 1 pts
FLASH_CS0n   = SP_CS0n; "PT0
"********( FLASH_W_PROTECTn )***********************************************
"PLA 0 pts
FLASH_W_PROTECTn= 1; "LUT
"********( INPUT_HILO )*****************************************************
"PLA 1 pts
INPUT_HILO.T = IO14.Q & !B_0_ACQ_BEGIN.Q; "PT0
INPUT_HILO.AR= IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
INPUT_HILO.C = B_0_SAMPL_CLK; "BCT6
"********( IN_STATUS0 )*****************************************************
"PLA 0 pts
IN_STATUS0.D = CH_IN0; "IREG
!IN_STATUS0.C= SP_OEn; "BCT4
"********( IN_STATUS1 )*****************************************************
"PLA 0 pts
IN_STATUS1.D = CH_IN1; "IREG
!IN_STATUS1.C= SP_OEn; "BCT4
"********( IN_STATUS2 )*****************************************************
"PLA 0 pts
IN_STATUS2.D = CH_IN2; "IREG
!IN_STATUS2.C= SP_OEn; "BCT4
"********( IN_STATUS3 )*****************************************************
"PLA 0 pts
IN_STATUS3.D = CH_IN3; "IREG
!IN_STATUS3.C= SP_OEn; "BCT4
"********( IN_STATUS4 )*****************************************************
"PLA 0 pts
IN_STATUS4.D = CH_IN4; "IREG
!IN_STATUS4.C= SP_OEn; "BCT4
"********( IN_STATUS5 )*****************************************************
"PLA 0 pts
IN_STATUS5.D = CH_IN5; "IREG
!IN_STATUS5.C= SP_OEn; "BCT4
"********( IN_STATUS6 )*****************************************************
"PLA 0 pts
IN_STATUS6.D = CH_IN6; "IREG
!IN_STATUS6.C= SP_OEn; "BCT4
"********( IN_STATUS7 )*****************************************************
"PLA 0 pts
IN_STATUS7.D = CH_IN7; "IREG
!IN_STATUS7.C= SP_OEn; "BCT4
"********( IO13 )***********************************************************
"PLA 1 pts
!IO13.T      = IO13.Q; "PT0
!IO13.AR     = IO14.Q; "BCT1
!IO13.C      = B_0_N177842; "BCT4
"********( IO14 )***********************************************************
"PLA 2 pts
IO14.T       = !SP_A19 & !IO14.Q & !SP_A3 & !SP_A4 & SP_A1 & SP_A2 
               & SP_D15.PIN & !SP_CS1n
               # !SP_A19 & IO14.Q & !SP_A3 & !SP_A4 & SP_A1 & SP_A2 
               & !SP_D15.PIN & !SP_CS1n;
IO14.AR      = !B_0_N139394.Q & !B_0_N133062.Q & !B_0_N133020.Q 
               & !B_0_N133058.Q & !B_0_N133024.Q & !B_0_N133018.Q 
               & !B_0_N133060.Q & !B_0_N133026.Q & !B_0_N133028.Q 
               & !B_0_N139401.Q & !B_0_N133030.Q & !B_0_N133022.Q; "BCT0
IO14.C       = SP_WEn; "GCT(FB1)
"********( IO15 )***********************************************************
"PLA 1 pts
IO15         = SRAM_CS1n.COM; "PT0
"********( LED_0 )**********************************************************
"PLA 1 pts
!LED_0       = E_0_xpla_dummy_o_64.Q; "PT0
"********( LED_1 )**********************************************************
"PLA 1 pts
!LED_1       = E_0_xpla_dummy_o_66.Q; "PT0
"********( LED_2 )**********************************************************
"PLA 1 pts
!LED_2       = E_0_xpla_dummy_o_68.Q; "PT0
"********( LED_3 )**********************************************************
"PLA 1 pts
!LED_3       = IO14.Q;
"********( N_PZ_5586 )******************************************************
"PLA 1 pts
!N_PZ_5586   = !SP_A3 & !SP_A19 & !SP_CS1n & SP_A1 & !SP_A4 & !SP_A2; "PT0
"********( N_PZ_5587 )******************************************************
"PLA 1 pts
!N_PZ_5587   = !SP_OEn & !SP_A19 & !SP_CS1n; "PT0
"********( N_PZ_5595 )******************************************************
"PLA 3 pts
N_PZ_5595    = !IO14.Q & SP_CS0n & !SP_A19
               # !IO14.Q & SP_WEn
               # !IO14.Q & SP_CS0n & SP_CS1n;
"********( N_PZ_5596 )******************************************************
"PLA 2 pts
N_PZ_5596    = !SP_CS0n & !SP_OEn
               # !SP_OEn & !SP_CS1n;
"********( N_PZ_5597 )******************************************************
"PLA 2 pts
N_PZ_5597    = !B_0_SAMPL_CLK & !IO14.Q
               # !B_0_SAMPL_CLK & A_0_xpla_dummy_o_1.Q;
"********( N_PZ_5599 )******************************************************
"PLA 2 pts
N_PZ_5599    = B_0_SAMPL_CLK & IO13.Q
               # !N_PZ_5586 & SP_WEn;
"********( OEn )************************************************************
"PLA 1 pts
!OEn         = !IO14.Q & !SP_OEn; "PT0
"********( RAM_A0 )*********************************************************
"PLA 1 pts
RAM_A0.T     = INPUT_HILO.Q & IO14.Q & !B_0_ACQ_BEGIN.Q; "PT0
RAM_A0.AR    = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A0.C     = B_0_SAMPL_CLK; "BCT6
"********( RAM_A1 )*********************************************************
"PLA 1 pts
RAM_A1.T     = INPUT_HILO.Q & RAM_A0.Q & IO14.Q & !B_0_ACQ_BEGIN.Q; "PT0
RAM_A1.AR    = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A1.C     = B_0_SAMPL_CLK; "BCT6
"********( RAM_A10 )********************************************************
"PLA 1 pts
RAM_A10.T    = RAM_A7.Q & INPUT_HILO.Q & RAM_A1.Q & RAM_A8.Q & RAM_A0.Q 
               & IO14.Q & RAM_A4.Q & !B_0_ACQ_BEGIN.Q & RAM_A2.Q 
               & RAM_A5.Q & RAM_A6.Q & RAM_A3.Q & RAM_A9.Q; "PT0
RAM_A10.AR   = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A10.C    = B_0_SAMPL_CLK; "BCT6
"********( RAM_A11 )********************************************************
"PLA 1 pts
RAM_A11.T    = RAM_A7.Q & INPUT_HILO.Q & RAM_A1.Q & RAM_A10.Q & RAM_A8.Q 
               & RAM_A0.Q & IO14.Q & RAM_A4.Q & !B_0_ACQ_BEGIN.Q 
               & RAM_A2.Q & RAM_A5.Q & RAM_A6.Q & RAM_A3.Q & RAM_A9.Q;
               "PT0
RAM_A11.AR   = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A11.C    = B_0_SAMPL_CLK; "BCT6
"********( RAM_A12 )********************************************************
"PLA 1 pts
RAM_A12.T    = RAM_A7.Q & INPUT_HILO.Q & RAM_A1.Q & RAM_A10.Q & RAM_A8.Q 
               & RAM_A0.Q & IO14.Q & RAM_A4.Q & RAM_A11.Q 
               & !B_0_ACQ_BEGIN.Q & RAM_A2.Q & RAM_A5.Q & RAM_A6.Q 
               & RAM_A3.Q & RAM_A9.Q; "PT0
RAM_A12.AR   = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A12.C    = B_0_SAMPL_CLK; "BCT6
"********( RAM_A2 )*********************************************************
"PLA 1 pts
RAM_A2.T     = INPUT_HILO.Q & RAM_A1.Q & RAM_A0.Q & IO14.Q 
               & !B_0_ACQ_BEGIN.Q; "PT0
RAM_A2.AR    = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A2.C     = B_0_SAMPL_CLK; "BCT6
"********( RAM_A3 )*********************************************************
"PLA 1 pts
RAM_A3.T     = INPUT_HILO.Q & RAM_A1.Q & RAM_A0.Q & IO14.Q 
               & !B_0_ACQ_BEGIN.Q & RAM_A2.Q; "PT0
RAM_A3.AR    = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A3.C     = B_0_SAMPL_CLK; "BCT6
"********( RAM_A4 )*********************************************************
"PLA 1 pts
RAM_A4.T     = INPUT_HILO.Q & RAM_A1.Q & RAM_A0.Q & IO14.Q & RAM_A3.Q 
               & !B_0_ACQ_BEGIN.Q & RAM_A2.Q; "PT0
RAM_A4.AR    = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A4.C     = B_0_SAMPL_CLK; "BCT6
"********( RAM_A5 )*********************************************************
"PLA 1 pts
RAM_A5.T     = INPUT_HILO.Q & RAM_A1.Q & RAM_A0.Q & IO14.Q & RAM_A4.Q 
               & RAM_A3.Q & !B_0_ACQ_BEGIN.Q & RAM_A2.Q; "PT0
RAM_A5.AR    = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A5.C     = B_0_SAMPL_CLK; "BCT6
"********( RAM_A6 )*********************************************************
"PLA 1 pts
RAM_A6.T     = INPUT_HILO.Q & RAM_A1.Q & RAM_A0.Q & IO14.Q & RAM_A4.Q 
               & RAM_A3.Q & !B_0_ACQ_BEGIN.Q & RAM_A2.Q & RAM_A5.Q; "PT0
RAM_A6.AR    = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A6.C     = B_0_SAMPL_CLK; "BCT6
"********( RAM_A7 )*********************************************************
"PLA 1 pts
RAM_A7.T     = INPUT_HILO.Q & RAM_A1.Q & RAM_A0.Q & IO14.Q & RAM_A4.Q 
               & RAM_A3.Q & !B_0_ACQ_BEGIN.Q & RAM_A2.Q & RAM_A5.Q 
               & RAM_A6.Q; "PT0
RAM_A7.AR    = IO14.Q & !A_0_xpla_dummy_o_1.Q; "GCT(FB3)
RAM_A7.C     = B_0_SAMPL_CLK; "BCT6
"********( RAM_A8 )*********************************************************
"PLA 1 pts
RAM_A8.T     = RAM_A7.Q & INPUT_HILO.Q & RAM_A1.Q & RAM_A0.Q & IO14.Q 
               & RAM_A4.Q & RAM_A3.Q & !B_0_ACQ_BEGIN.Q & RAM_A2.Q