analyzer.cxt

可编程器件厂商Xilinx的手持式逻辑分析仪的逻辑设计

<?xml version="1.0"?>
<!DOCTYPE Document SYSTEM "\data\xml\Power\pwrXPLATopo.dtd">
<Document Version="0" Module="analyzer" Date="Aug 13 22:40:25 2001" Device="XCR3256XL-10CS280">
<!--  Generator="XPLAOPT Version 3.43" -->
<Net NNm="CH_IN0" IoT="in" Loc="FB9_1"/>
<Net NNm="CH_IN1" IoT="in" Loc="FB9_2"/>
<Net NNm="CH_IN2" IoT="in" Loc="FB9_3"/>
<Net NNm="CH_IN3" IoT="in" Loc="FB9_4"/>
<Net NNm="CH_IN4" IoT="in" Loc="FB9_5"/>
<Net NNm="CH_IN5" IoT="in" Loc="FB9_12"/>
<Net NNm="CH_IN6" IoT="in" Loc="FB9_13"/>
<Net NNm="CH_IN7" IoT="in" Loc="FB9_14"/>
<Net NNm="SP_A1" IoT="in" Loc="FB7_14"/>
<Net NNm="SP_A10" IoT="in" Loc="FB1_4"/>
<Net NNm="SP_A11" IoT="in" Loc="FB3_1"/>
<Net NNm="SP_A12" IoT="in" Loc="FB5_5"/>
<Net NNm="SP_A13" IoT="in" Loc="FB5_1"/>
<Net NNm="SP_A14" IoT="in" Loc="FB1_1"/>
<Net NNm="SP_A15" IoT="in" Loc="FB3_15"/>
<Net NNm="SP_A16" IoT="in" Loc="FB3_3"/>
<Net NNm="SP_A17" IoT="in" Loc="FB3_16"/>
<Net NNm="SP_A18" IoT="in" Loc="FB5_12"/>
<Net NNm="SP_A19" IoT="in" Loc="FB1_2"/>
<Net NNm="SP_A2" IoT="in" Loc="FB7_4"/>
<Net NNm="SP_A20" IoT="in" Loc="FB1_12"/>
<Net NNm="SP_A21" IoT="in" Loc="FB3_2"/>
<Net NNm="SP_A3" IoT="in" Loc="FB7_12"/>
<Net NNm="SP_A4" IoT="in" Loc="FB5_13"/>
<Net NNm="SP_A5" IoT="in" Loc="FB5_4"/>
<Net NNm="SP_A6" IoT="in" Loc="FB7_3"/>
<Net NNm="SP_A7" IoT="in" Loc="FB5_15"/>
<Net NNm="SP_A8" IoT="in" Loc="FB3_14"/>
<Net NNm="SP_A9" IoT="in" Loc="FB3_5"/>
<Net NNm="SP_CS0n" IoT="in" Loc="FB2_1"/>
<Net NNm="SP_CS1n" IoT="in" Loc="FB1_13"/>
<Net NNm="SP_OEn" IoT="in" Loc="FB1_14"/>
<Net NNm="SP_RESETn" IoT="in" Loc="FB5_16"/>
<Net NNm="SP_WEn" IoT="in" Loc="FB1_5"/>
<Net NNm="SYS_CLK" IoT="in" ClkT="G"/>
<Net NNm="A0" IoT="out" Loc="FB15_5"/>
<Net NNm="A1" IoT="out" Loc="FB13_1"/>
<Net NNm="A10" IoT="out" Loc="FB15_12"/>
<Net NNm="A11" IoT="out" Loc="FB15_4"/>
<Net NNm="A12" IoT="out" Loc="FB15_14"/>
<Net NNm="A13" IoT="out" Loc="FB15_16"/>
<Net NNm="A14" IoT="out" Loc="FB15_2"/>
<Net NNm="A15" IoT="out" Loc="FB13_16"/>
<Net NNm="A16" IoT="out" Loc="FB15_3"/>
<Net NNm="A17" IoT="out" Loc="FB13_12"/>
<Net NNm="A18" IoT="out" Loc="FB12_2"/>
<Net NNm="A19" IoT="out" Loc="FB15_13"/>
<Net NNm="A2" IoT="out" Loc="FB13_2"/>
<Net NNm="A20" IoT="out" Loc="FB15_15"/>
<Net NNm="A3" IoT="out" Loc="FB13_3"/>
<Net NNm="A4" IoT="out" Loc="FB13_4"/>
<Net NNm="A5" IoT="out" Loc="FB13_13"/>
<Net NNm="A6" IoT="out" Loc="FB13_14"/>
<Net NNm="A7" IoT="out" Loc="FB13_5"/>
<Net NNm="A8" IoT="out" Loc="FB15_1"/>
<Net NNm="A9" IoT="out" Loc="FB13_15"/>
<Net NNm="FLASH_CS0n" IoT="out" Loc="FB4_1"/>
<Net NNm="FLASH_W_PROTECTn" IoT="out" Loc="FB12_12"/>
<Net NNm="IO13" IoT="out" Loc="FB10_4"/>
<Net NNm="IO14" IoT="out" Loc="FB10_5"/>
<Net NNm="IO15" IoT="out" Loc="FB10_12"/>
<Net NNm="LED_0" IoT="out" Loc="FB10_13"/>
<Net NNm="LED_1" IoT="out" Loc="FB10_14"/>
<Net NNm="LED_2" IoT="out" Loc="FB10_15"/>
<Net NNm="LED_3" IoT="out" Loc="FB10_16"/>
<Net NNm="OEn" IoT="out" Loc="FB4_2"/>
<Net NNm="RESET_MEMn" IoT="out" Loc="FB8_1"/>
<Net NNm="RWn" IoT="out" Loc="FB12_13"/>
<Net NNm="SP_IRQn" IoT="out" Loc="FB1_15"/>
<Net NNm="SRAM_CS1n" IoT="out" Loc="FB12_15"/>
<Net NNm="SRAM_LOW_BYTEn" IoT="out" Loc="FB12_16"/>
<Net NNm="SRAM_UPPER_BYTEn" IoT="out" Loc="FB12_14"/>
<Net NNm="D0" IoT="bidi" Loc="FB4_3"/>
<Net NNm="D1" IoT="bidi" Loc="FB4_5"/>
<Net NNm="D10" IoT="bidi" Loc="FB4_15"/>
<Net NNm="D11" IoT="bidi" Loc="FB11_15"/>
<Net NNm="D12" IoT="bidi" Loc="FB11_13"/>
<Net NNm="D13" IoT="bidi" Loc="FB11_12"/>
<Net NNm="D14" IoT="bidi" Loc="FB11_2"/>
<Net NNm="D15" IoT="bidi" Loc="FB11_3"/>
<Net NNm="D2" IoT="bidi" Loc="FB4_16"/>
<Net NNm="D3" IoT="bidi" Loc="FB4_13"/>
<Net NNm="D4" IoT="bidi" Loc="FB11_16"/>
<Net NNm="D5" IoT="bidi" Loc="FB11_5"/>
<Net NNm="D6" IoT="bidi" Loc="FB11_1"/>
<Net NNm="D7" IoT="bidi" Loc="FB11_4"/>
<Net NNm="D8" IoT="bidi" Loc="FB4_4"/>
<Net NNm="D9" IoT="bidi" Loc="FB4_12"/>
<Net NNm="SP_D0" IoT="bidi" Loc="FB8_15"/>
<Net NNm="SP_D1" IoT="bidi" Loc="FB8_5"/>
<Net NNm="SP_D10" IoT="bidi" Loc="FB8_12"/>
<Net NNm="SP_D11" IoT="bidi" Loc="FB2_12"/>
<Net NNm="SP_D12" IoT="bidi" Loc="FB2_13"/>
<Net NNm="SP_D13" IoT="bidi" Loc="FB2_3"/>
<Net NNm="SP_D14" IoT="bidi" Loc="FB2_2"/>
<Net NNm="SP_D15" IoT="bidi" Loc="FB1_3"/>
<Net NNm="SP_D2" IoT="bidi" Loc="FB8_14"/>
<Net NNm="SP_D3" IoT="bidi" Loc="FB2_15"/>
<Net NNm="SP_D4" IoT="bidi" Loc="FB2_14"/>
<Net NNm="SP_D5" IoT="bidi" Loc="FB2_16"/>
<Net NNm="SP_D6" IoT="bidi" Loc="FB2_5"/>
<Net NNm="SP_D7" IoT="bidi" Loc="FB2_4"/>
<Net NNm="SP_D8" IoT="bidi" Loc="FB8_13"/>
<Net NNm="SP_D9" IoT="bidi" Loc="FB7_15"/>
<Net NNm="UCT0" IoT="none" ClkT="U"/>
<Net NNm="UCT1" IoT="none" ClkT="U"/>
<Net NNm="UCT3" IoT="none" ClkT="U"/>
<Net NNm="PT_VCC" IoT="none"/>
<Net NNm="PT_GND" IoT="none"/>
<Lb Nm="FB1">
 <LbT Nm="FB1_PT0" PtT="CT">
  <LbTO NNm="FB1_PT0"/>
  <!-- N_PZ_5596_n -->
  <LbTI NNm="FB4_14_N"/>
 </LbT>
 <LbT Nm="FB1_PT1" PtT="CT">
  <LbTO NNm="FB1_PT1"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
 </LbT>
 <LbT Nm="FB1_PT2" PtT="CT">
  <LbTO NNm="FB1_PT2"/>
  <!-- D15_p -->
  <LbTI NNm="FB11_3_P"/>
  <!-- N_PZ_5587_n -->
  <LbTI NNm="FB9_11_N"/>
 </LbT>
 <LbT Nm="FB1_PT3" PtT="CT">
  <LbTO NNm="FB1_PT3"/>
  <!-- SP_A1_p -->
  <LbTI NNm="FB7_14_P"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
  <!-- N_PZ_5587_n -->
  <LbTI NNm="FB9_11_N"/>
 </LbT>
 <LbT Nm="FB1_PT4" PtT="CT">
  <LbTO NNm="FB1_PT4"/>
  <!-- IO13_n -->
  <LbTI NNm="FB10_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT5" PtT="CT">
  <LbTO NNm="FB1_PT5"/>
  <!-- C_0_SYS_CLK2_n -->
  <LbTI NNm="FB1_11_N"/>
 </LbT>
 <LbT Nm="FB1_PT6" PtT="CT">
  <LbTO NNm="FB1_PT6"/>
  <!-- B_0_SAMPL_CLK_n -->
  <LbTI NNm="FB9_6_N"/>
 </LbT>
 <LbT Nm="FB1_PT7" PtT="UCT">
  <LbTO NNm="FB1_PT7"/>
  <!-- SP_WEn_p -->
  <LbTI NNm="FB1_5_P"/>
 </LbT>
 <LbT Nm="FB1_PT8" PtT="0">
  <LbTO NNm="FB1_PT8"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
  <!-- INPUT_HILO_n -->
  <LbTI NNm="FB3_5_N"/>
  <!-- RAM_A0_n -->
  <LbTI NNm="FB3_14_N"/>
  <!-- RAM_A1_n -->
  <LbTI NNm="FB3_15_N"/>
  <!-- RAM_A2_n -->
  <LbTI NNm="FB1_16_N"/>
  <!-- RAM_A3_n -->
  <LbTI NNm="FB1_14_N"/>
  <!-- RAM_A4_n -->
  <LbTI NNm="FB1_13_N"/>
  <!-- RAM_A5_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- RAM_A6_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- RAM_A7_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- RAM_A8_n -->
  <LbTI NNm="FB1_2_N"/>
  <!-- B_0_ACQ_BEGIN_n -->
  <LbTI NNm="FB3_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT10" PtT="0">
  <LbTO NNm="FB1_PT10"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
  <!-- INPUT_HILO_n -->
  <LbTI NNm="FB3_5_N"/>
  <!-- RAM_A0_n -->
  <LbTI NNm="FB3_14_N"/>
  <!-- RAM_A1_n -->
  <LbTI NNm="FB3_15_N"/>
  <!-- RAM_A2_n -->
  <LbTI NNm="FB1_16_N"/>
  <!-- RAM_A3_n -->
  <LbTI NNm="FB1_14_N"/>
  <!-- RAM_A4_n -->
  <LbTI NNm="FB1_13_N"/>
  <!-- RAM_A5_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- RAM_A6_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- RAM_A7_n -->
  <LbTI NNm="FB1_4_N"/>
  <!-- B_0_ACQ_BEGIN_n -->
  <LbTI NNm="FB3_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT14" PtT="0">
  <LbTO NNm="FB1_PT14"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
  <!-- INPUT_HILO_n -->
  <LbTI NNm="FB3_5_N"/>
  <!-- RAM_A0_n -->
  <LbTI NNm="FB3_14_N"/>
  <!-- RAM_A1_n -->
  <LbTI NNm="FB3_15_N"/>
  <!-- RAM_A2_n -->
  <LbTI NNm="FB1_16_N"/>
  <!-- RAM_A3_n -->
  <LbTI NNm="FB1_14_N"/>
  <!-- RAM_A4_n -->
  <LbTI NNm="FB1_13_N"/>
  <!-- RAM_A5_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- RAM_A6_n -->
  <LbTI NNm="FB1_5_N"/>
  <!-- B_0_ACQ_BEGIN_n -->
  <LbTI NNm="FB3_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT16" PtT="0">
  <LbTO NNm="FB1_PT16"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
  <!-- INPUT_HILO_n -->
  <LbTI NNm="FB3_5_N"/>
  <!-- RAM_A0_n -->
  <LbTI NNm="FB3_14_N"/>
  <!-- RAM_A1_n -->
  <LbTI NNm="FB3_15_N"/>
  <!-- RAM_A2_n -->
  <LbTI NNm="FB1_16_N"/>
  <!-- RAM_A3_n -->
  <LbTI NNm="FB1_14_N"/>
  <!-- RAM_A4_n -->
  <LbTI NNm="FB1_13_N"/>
  <!-- RAM_A5_n -->
  <LbTI NNm="FB1_12_N"/>
  <!-- B_0_ACQ_BEGIN_n -->
  <LbTI NNm="FB3_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT18" PtT="0">
  <LbTO NNm="FB1_PT18"/>
  <!-- RAM_A1_n -->
  <LbTI NNm="FB3_15_N"/>
 </LbT>
 <LbT Nm="FB1_PT20" PtT="0">
  <LbTO NNm="FB1_PT20"/>
  <!-- RAM_A0_n -->
  <LbTI NNm="FB3_14_N"/>
 </LbT>
 <LbT Nm="FB1_PT26" PtT="0">
  <LbTO NNm="FB1_PT26"/>
  <!-- A_0_QA_n -->
  <LbTI NNm="FB1_10_N"/>
 </LbT>
 <LbT Nm="FB1_PT30" PtT="0">
  <LbTO NNm="FB1_PT30"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
  <!-- INPUT_HILO_n -->
  <LbTI NNm="FB3_5_N"/>
  <!-- RAM_A0_n -->
  <LbTI NNm="FB3_14_N"/>
  <!-- RAM_A1_n -->
  <LbTI NNm="FB3_15_N"/>
  <!-- RAM_A2_n -->
  <LbTI NNm="FB1_16_N"/>
  <!-- RAM_A3_n -->
  <LbTI NNm="FB1_14_N"/>
  <!-- RAM_A4_n -->
  <LbTI NNm="FB1_13_N"/>
  <!-- B_0_ACQ_BEGIN_n -->
  <LbTI NNm="FB3_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT32" PtT="0">
  <LbTO NNm="FB1_PT32"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
  <!-- INPUT_HILO_n -->
  <LbTI NNm="FB3_5_N"/>
  <!-- RAM_A0_n -->
  <LbTI NNm="FB3_14_N"/>
  <!-- RAM_A1_n -->
  <LbTI NNm="FB3_15_N"/>
  <!-- RAM_A2_n -->
  <LbTI NNm="FB1_16_N"/>
  <!-- RAM_A3_n -->
  <LbTI NNm="FB1_14_N"/>
  <!-- B_0_ACQ_BEGIN_n -->
  <LbTI NNm="FB3_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT34" PtT="0">
  <LbTO NNm="FB1_PT34"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
  <!-- INPUT_HILO_n -->
  <LbTI NNm="FB3_5_N"/>
  <!-- RAM_A0_n -->
  <LbTI NNm="FB3_14_N"/>
  <!-- RAM_A1_n -->
  <LbTI NNm="FB3_15_N"/>
  <!-- RAM_A2_n -->
  <LbTI NNm="FB1_16_N"/>
  <!-- B_0_ACQ_BEGIN_n -->
  <LbTI NNm="FB3_4_N"/>
 </LbT>
 <LbT Nm="FB1_PT38" PtT="0">
  <LbTO NNm="FB1_PT38"/>
  <!-- IO14_n -->
  <LbTI NNm="FB10_5_N"/>
  <!-- INPUT_HILO_n -->
  <LbTI NNm="FB3_5_N"/>
  <!-- RAM_A0_n -->
  <LbTI NNm="FB3_14_N"/>
  <!-- RAM_A1_n -->
  <LbTI NNm="FB3_15_N"/>
  <!-- B_0_ACQ_BEGIN_n -->
  <LbTI NNm="FB3_4_N"/>
 </LbT>
 <Mc Nm="FB1_1">
  <FBMux Nm="FB1_1_N">
   <MuxCon NNm="FB1_1_N" Port="Z"/>
   <MuxCon NNm="FB1_1_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_1_P">
   <MuxCon NNm="FB1_1_P" Port="Z"/>
   <MuxCon NNm="FB1_1_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_1_I">
   <BufCon NNm="FB1_1_I" Port="Z"/>
   <BufCon NNm="SP_A14" Port="I"/>
  </InBuf>
  <DFlop Nm="FB1_1_FF">
   <FlopCon NNm="FB1_PT6" Port="CLK"/>
   <FlopCon NNm="UCT3" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT8" Port="D"/>
   <FlopCon NNm="FB1_1_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_2">
  <FBMux Nm="FB1_2_N">
   <MuxCon NNm="FB1_2_N" Port="Z"/>
   <MuxCon NNm="FB1_2_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_2_P">
   <MuxCon NNm="FB1_2_P" Port="Z"/>
   <MuxCon NNm="FB1_2_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_2_I">
   <BufCon NNm="FB1_2_I" Port="Z"/>
   <BufCon NNm="SP_A19" Port="I"/>
  </InBuf>
  <DFlop Nm="FB1_2_FF">
   <FlopCon NNm="FB1_PT6" Port="CLK"/>
   <FlopCon NNm="UCT3" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT10" Port="D"/>
   <FlopCon NNm="FB1_2_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_3">
  <FBMux Nm="FB1_3_N">
   <MuxCon NNm="FB1_3_N" Port="Z"/>
   <MuxCon NNm="FB1_3_D" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_3_P">
   <MuxCon NNm="FB1_3_P" Port="Z"/>
   <MuxCon NNm="FB1_3_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_3_I">
   <BufCon NNm="FB1_3_I" Port="Z"/>
   <BufCon NNm="SP_D15" Port="I"/>
  </InBuf>
  <OutBuf Nm="FB1_3_O">
   <BufCon NNm="SP_D15" Port="Z"/>
   <BufCon NNm="FB1_3_D" Port="I"/>
   <BufCon NNm="FB1_PT0" Port="OE"/>
  </OutBuf>
  <Or Nm="FB1_3_OR">
   <OrCon NNm="FB1_PT2" Port="I"/>
   <OrCon NNm="FB1_PT3" Port="I"/>
   <OrCon NNm="FB1_3_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB1_4">
  <FBMux Nm="FB1_4_N">
   <MuxCon NNm="FB1_4_N" Port="Z"/>
   <MuxCon NNm="FB1_4_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_4_P">
   <MuxCon NNm="FB1_4_P" Port="Z"/>
   <MuxCon NNm="FB1_4_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_4_I">
   <BufCon NNm="FB1_4_I" Port="Z"/>
   <BufCon NNm="SP_A10" Port="I"/>
  </InBuf>
  <DFlop Nm="FB1_4_FF">
   <FlopCon NNm="FB1_PT6" Port="CLK"/>
   <FlopCon NNm="UCT3" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT14" Port="D"/>
   <FlopCon NNm="FB1_4_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_5">
  <FBMux Nm="FB1_5_N">
   <MuxCon NNm="FB1_5_N" Port="Z"/>
   <MuxCon NNm="FB1_5_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_5_P">
   <MuxCon NNm="FB1_5_P" Port="Z"/>
   <MuxCon NNm="FB1_5_I" Port="I"/>
  </MCMux>
  <InBuf Nm="FB1_5_I">
   <BufCon NNm="FB1_5_I" Port="Z"/>
   <BufCon NNm="SP_WEn" Port="I"/>
  </InBuf>
  <DFlop Nm="FB1_5_FF">
   <FlopCon NNm="FB1_PT6" Port="CLK"/>
   <FlopCon NNm="UCT3" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT16" Port="D"/>
   <FlopCon NNm="FB1_5_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_6">
  <FBMux Nm="FB1_6_N">
   <MuxCon NNm="FB1_6_N" Port="Z"/>
   <MuxCon NNm="FB1_6_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_6_P">
   <MuxCon NNm="FB1_6_P" Port="Z"/>
   <MuxCon NNm="FB1_6_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_6_FF">
   <FlopCon NNm="FB1_PT4" Port="CLK"/>
   <FlopCon NNm="UCT3" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT18" Port="D"/>
   <FlopCon NNm="FB1_6_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_7">
  <FBMux Nm="FB1_7_N">
   <MuxCon NNm="FB1_7_N" Port="Z"/>
   <MuxCon NNm="FB1_7_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_7_P">
   <MuxCon NNm="FB1_7_P" Port="Z"/>
   <MuxCon NNm="FB1_7_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_7_FF">
   <FlopCon NNm="FB1_PT4" Port="CLK"/>
   <FlopCon NNm="UCT3" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_PT20" Port="D"/>
   <FlopCon NNm="FB1_7_Q" Port="Q"/>
  </DFlop>
 </Mc>
 <Mc Nm="FB1_8">
  <FBMux Nm="FB1_8_N">
   <MuxCon NNm="FB1_8_N" Port="Z"/>
   <MuxCon NNm="FB1_8_Q" Port="I"/>
  </FBMux>
  <MCMux Nm="FB1_8_P">
   <MuxCon NNm="FB1_8_P" Port="Z"/>
   <MuxCon NNm="FB1_8_I" Port="I"/>
  </MCMux>
  <DFlop Nm="FB1_8_FF">
   <FlopCon NNm="FB1_PT5" Port="CLK"/>
   <FlopCon NNm="UCT3" Port="RST"/>
   <FlopCon NNm="PT_GND" Port="PST"/>
   <FlopCon NNm="FB1_8_D" Port="D"/>
   <FlopCon NNm="FB1_8_Q" Port="Q"/>
  </DFlop>
  <Or Nm="FB1_8_OR">
   <OrCon NNm="FB1_PT1" Port="I"/>
   <OrCon NNm="FB1_8_D" Port="Z"/>
  </Or>
 </Mc>
 <Mc Nm="FB1_9">