流水灯vhdl程序.txt

流水灯的VHDL原程序,以4种模式LED显示.

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity line is
port(
      clk:in std_logic;
      clk1:in std_logic;
      rst:in std_logic;
      start_flag:in std_logic;
      led7s:out std_logic_vector(6 downto 0);
      data_out :out std_logic_vector(7 downto 0));
end entity ;
architecture one of line is
  signal Q:     std_logic_vector(2 downto 0);
  signal count: std_logic_vector(2 downto 0);

  begin
  u1: process(clk,rst)
     begin
          if rst='1' then led7s <="0111111";   
          elsif clk'event and clk='1' then
               Q <= Q+1;           
               case Q is
               when "000" => led7s <= "0111111";--0
               when "001" => led7s <= "0000110";--1
               when "010" => led7s <= "1011011";--2
               when "011" => led7s <= "1001111";--3
               when "100" => led7s <= "1100110";--4
               when "101" => led7s <= "1101101";--5
               when "110" => led7s <= "1111101";--6
               when "111" => led7s <= "0000111";--7

 when others => null;
               end case ;
         end if;
       end process;
 u2: process (Q,clk1,rst)
      begin 
        if rst='1' then data_out <="00000000";
        elsif clk1'event and clk1 = '1' then 
        if start_flag='1'   then 
            count <= count+1;
           case count is 
           when "000" => if(Q="000") then data_out <= "00000001";elsif (Q ="001") then data_out <= "10000000";elsif(Q="010") then data_out <= "10000001";else data_out <= "00011000"; end if;
           when "001" => if(Q="000") then data_out <= "00000010";elsif (Q ="001") then data_out <= "01000000";elsif (Q="010") then data_out <= "01000010";else data_out <= "00100100"; end if;
           when "010" => if(Q="000") then data_out <= "00000100";elsif (Q ="001") then data_out <= "00100000";elsif (Q="010") then data_out <= "00100100";else data_out <= "01000010"; end if;
           when "011" => if(Q="000") then data_out <= "00001000";elsif (Q ="001") then data_out <= "00010000";elsif (Q="010") then data_out <= "00011000";else data_out <= "10000001"; end if;
           when "100" => if(Q="000") then data_out <= "00010000";elsif (Q ="001") then data_out <= "00001000";elsif (Q="010") then data_out <= "00011000";else data_out <= "00011000"; end if;
           when "101" => if(Q="000") then data_out <= "00100000";elsif (Q ="001") then data_out <= "00000100";elsif (Q="010") then data_out <= "00100100";else data_out <= "00100100"; end if;
           when "110" => if(Q="000") then data_out <= "01000000";elsif (Q ="001") then data_out <= "00000010";elsif (Q="010") then data_out <= "01000010";else data_out <= "01000010"; end if;
           when "111" => if(Q="000") then data_out <= "10000000";elsif (Q ="001") then data_out <= "00000001";elsif (Q="010") then data_out <= "10000001";else data_out <= "10000001"; end if;
            when others => null;
           end case ;
           end if ;
           end if ;
           end process;
           end ;