📄 kbian.vhd
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LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
ENTITY kbian IS
PORT (A,B,C,D,E,F,G,H,I,J : IN std_logic;
T,X,Y,Z,W : OUT std_logic);
END kbian;
ARCHITECTURE kbian_arc OF kbian IS
BEGIN
PROCESS(A,B,C,D,E,F,G,H,I,J)
BEGIN
IF (A = '1') THEN
T <= '1';
X <= '0'; Y <= '0'; Z <= '0'; W <= '0';
ELSIF (B = '1') THEN
T <= '1';
X <= '1'; Y <= '0'; Z <= '0'; W <= '0';
ELSIF (C = '1') THEN
T <= '1';
X <= '0'; Y <= '1'; Z <= '0'; W <= '0';
ELSIF (D = '1') THEN
T <= '1';
X <= '1'; Y <= '1'; Z <= '0'; W <= '0';
ELSIF (E = '1') THEN
T <= '1';
X <= '0'; Y <= '0'; Z <= '1'; W <= '0';
ELSIF (F = '1') THEN
T <= '1';
X <= '1'; Y <= '0'; Z <= '1'; W <= '0';
ELSIF (G = '1') THEN
T <= '1';
X <= '0'; Y <= '1'; Z <= '1'; W <= '0';
ELSIF (H = '1') THEN
T <= '1';
X <= '1'; Y <= '1'; Z <= '1'; W <= '0';
ELSIF (I = '1') THEN
T <= '1';
X <= '0'; Y <= '0'; Z <= '0'; W <= '1';
ELSIF (J = '1') THEN
T <= '1';
X <= '1'; Y <= '0'; Z <= '0'; W <= '1';
ELSE
T <= '0';
X <= '1'; Y <= '1'; Z <= '1'; W <= '1';
END IF;
END PROCESS;
END kbian_arc;
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