📄 k4mux.vhd
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LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
ENTITY k4mux IS
PORT (A,B : IN std_logic;
C,D,E,F : OUT std_logic);
END k4mux;
ARCHITECTURE k4mux_arc OF k4mux IS
BEGIN
PROCESS(A,B)
BEGIN
IF (A = '0' AND B = '0') THEN
C <= '0'; D <= '0'; E <= '1'; F<= '0';
ELSIF (A = '1' AND B = '0') THEN
C <= '1'; D <= '0'; E <= '0'; F<= '0';
ELSIF (A = '0' AND B = '1') THEN
C <= '1'; D <= '0'; E <= '0'; F<= '0';
ELSE
C <= '1'; D <= '1'; E <= '1'; F<= '1';
END IF;
END PROCESS;
END k4mux_arc;
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