addrdcde.pin

服务器的的板在载控制器的AHDL程序,包括原理图编译,用在EPM7128上(CPLD).

-- Copyright (C) 1988-1999 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
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N.C. = No Connect, This pin has no internal connection to the device.
VCC = Dedicated power pin, which MUST be connected to VCC.
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.

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CHIP "addrdcde" ASSIGNED TO AN EPM7032SLC44-5
GND                              : 1
GND                              : 2
VCC                              : 3
RESET_N                          : 4
SEL0_N                           : 5
SEL1_N                           : 6
TDI                              : 7
ADDR15                           : 8
ADDR0                            : 9
GND                              : 10
ADDR1                            : 11
ADDR2                            : 12
TMS                              : 13
ADDR3                            : 14
VCC                              : 15
FPGA_SEL_N                       : 16
RESERVED                         : 17
RESERVED                         : 18
RESERVED                         : 19
RESERVED                         : 20
RESERVED                         : 21
GND                              : 22
VCC                              : 23
PORT12                           : 24
PORT7                            : 25
PORT8                            : 26
PORT9                            : 27
PORT0                            : 28
PORT10                           : 29
GND                              : 30
RAM_SEL_N                        : 31
TCK                              : 32
PORT11                           : 33
PORT4                            : 34
VCC                              : 35
PORT5                            : 36
PORT3                            : 37
TDO                              : 38
PORT2                            : 39
PORT6                            : 40
PORT1                            : 41
GND                              : 42
GND                              : 43
GND                              : 44