kvmf.rpt

服务器的的板在载控制器的AHDL程序,包括原理图编译,用在EPM7128上(CPLD).

Project Information                                 d:\digital_030423\kvmf.rpt

MAX+plus II Compiler Report File
Version 10.2 07/10/2002
Compiled: 07/30/2005 10:55:09

Copyright (C) 1988-2002 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful




** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir         Shareable
POF       Device          Pins    Pins     Pins     LCs  Expanders  % Utilized

kvmf      EPM7128STC100-6  36       19       8      36      19          28 %

User Pins:                 36       19       8  



Project Information                                 d:\digital_030423\kvmf.rpt

** PROJECT COMPILATION MESSAGES **

Info: Reserved unused input pin 'addr3' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'addr4' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'addr5' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board
Info: Reserved unused input pin 'addr6' for future use because it has a pin assignment -- pin is tri-stated and must be connected to your board


Project Information                                 d:\digital_030423\kvmf.rpt

** PIN/LOCATION/CHIP ASSIGNMENTS **

                  Actual                  
    User       Assignments                
Assignments   (if different)     Node Name

kvmf@14                           addr0
kvmf@13                           addr1
kvmf@12                           addr2
kvmf@10                           addr3
kvmf@9                            addr4
kvmf@8                            addr5
kvmf@7                            addr6
kvmf@6                            addr15
kvmf@35                           backdediled
kvmf@28                           DEDI_IO1
kvmf@44                           DED_LED1
kvmf@16                           d0
kvmf@17                           d1
kvmf@19                           d2
kvmf@20                           d3
kvmf@21                           d4
kvmf@22                           d5
kvmf@23                           d6
kvmf@24                           d7
kvmf@63                           EN_DRV
kvmf@100                          fanout1
kvmf@1                            fanout2
kvmf@33                           FAN0
kvmf@94                           FAN1
kvmf@76                           FAN2
kvmf@41                           FAN3
kvmf@29                           heartbeat3
kvmf@48                           heatbeat1
kvmf@50                           heatbeat2
kvmf@53                           keyboadclk
kvmf@56                           keyboarddata
kvmf@5                            Mb_PWR_LED1
kvmf@55                           MB_PWR_SW
kvmf@58                           MB_RST1
kvmf@47                           mouseclk
kvmf@45                           mousedata
kvmf@52                           muxio1
kvmf@60                           muxio2
kvmf@57                           PWR_EN1
kvmf@25                           PWR_REQ1
kvmf@36                           PWR_STA
kvmf@31                           PWR_SW1
kvmf@92                           ram_sel
kvmf@99                           rd
kvmf@89                           reset
kvmf@49                           RST_SW1
kvmf@97                           sel0
kvmf@98                           sel1
kvmf@37                           SLC1_SW1
kvmf@32                           SLC2_SW1
kvmf@64                           slot0
kvmf@65                           slot1
kvmf@67                           slot2
kvmf@68                           slot3
kvmf@69                           sw0
kvmf@70                           sw1
kvmf@71                           sw2
kvmf@72                           sw3
kvmf@90                           wr


Project Information                                 d:\digital_030423\kvmf.rpt

** FILE HIERARCHY **



|74373:296|
|74373:588|
|74373:307|
|74373:387|
|74373:408|
|delay:513|
|delay:508|
|delay:507|
|delay:509|
|delay:511|
|delay:510|
|delay:503|
|delay:506|
|delay:505|
|delay:202|
|delay:243|
|delay:200|
|delay:501|
|delay:500|
|delay:502|
|delay:201|
|delay:499|
|delay:485|
|delay:486|
|delay:484|
|delay:497|
|delay:498|
|delay:487|
|delay:488|
|delay:494|
|delay:495|
|delay:496|
|delay:491|
|delay:489|
|delay:490|
|delay:493|
|delay:492|
|addr38:304|
|addr38:304|74138:4|
|l_addr_code:516|
|8_6:564|
|8_6:564|8_1:29|
|8_6:564|8_1:28|
|8_6:564|8_1:27|
|8_6:564|8_1:26|
|8_6:564|8_1:25|
|8_6:564|8_1:24|
|8_6:564|addr38:30|
|8_6:564|addr38:30|74138:4|


Device-Specific Information:                        d:\digital_030423\kvmf.rpt
kvmf

***** Logic for device 'kvmf' compiled without errors.




Device: EPM7128STC100-6

Device Options:
    Turbo Bit                                    = ON
    Security Bit                                 = OFF
    Enable JTAG Support                        = ON
    User Code                                  = ffff
    MultiVolt I/O                              = OFF

                                                                     
                                                                     
                                                                     
                                                                     
                          R     R               R R R   R R R R R    
                  f       E     E r             E E E   E E E E E    
                  a       S     S a V           S S S   S S S S S    
                  n       E     E m C   r       E E E V E E E E E    
                  o   s s R   F R _ C   e       R R R C R R R R R F  
                  u   e e V G A V s I   s G G G V V V C V V V V V A  
                  t r l l E N N E e N w e N N N E E E I E E E E E N  
                  1 d 1 0 D D 1 D l T r t D D D D D D O D D D D D 2  
                ----------------------------------------------------_ 
               / 100  98  96  94  92  90  88  86  84  82  80  78  76   |_ 
              /     99  97  95  93  91  89  87  85  83  81  79  77    | 
     fanout2 |  1                                                    75 | RESERVED 
    RESERVED |  2                                                    74 | GND 
       VCCIO |  3                                                    73 | #TDO 
        #TDI |  4                                                    72 | sw3 
 Mb_PWR_LED1 |  5                                                    71 | sw2 
      addr15 |  6                                                    70 | sw1 
       addr6 |  7                                                    69 | sw0 
       addr5 |  8                                                    68 | slot3 
       addr4 |  9                                                    67 | slot2 
       addr3 | 10                                                    66 | VCCIO 
         GND | 11                                                    65 | slot1 
       addr2 | 12                                                    64 | slot0 
       addr1 | 13                  EPM7128STC100-6                   63 | EN_DRV 
       addr0 | 14                                                    62 | #TCK 
        #TMS | 15                                                    61 | bb 
          d0 | 16                                                    60 | muxio2 
          d1 | 17                                                    59 | GND 
       VCCIO | 18                                                    58 | MB_RST1 
          d2 | 19                                                    57 | PWR_EN1 
          d3 | 20                                                    56 | keyboarddata 
          d4 | 21                                                    55 | MB_PWR_SW 
          d5 | 22                                                    54 | zz 
          d6 | 23                                                    53 | keyboadclk 
          d7 | 24                                                    52 | muxio1 
    PWR_REQ1 | 25                                                    51 | VCCIO 
             |      27  29  31  33  35  37  39  41  43  45  47  49  _| 
              \   26  28  30  32  34  36  38  40  42  44  46  48  50   | 
               \----------------------------------------------------- 
                  G a D h s P S F V b P S G V R F R G D m R m h R h  
                  N a E e s W L A C a W L N C E A E N E o E o e S e  
                  D   D a   R C N C c R C D C S N S D D u S u a T a  
                      I r   _ 2 0 I k _ 1   I E 3 E   _ s E s t _ t  
                      _ t   S _   O d S _   N R   R   L e R e b S b  
                      I b   W S     e T S   T V   V   E d V c e W e  
                      O e   1 W     d A W     E   E   D a E l a 1 a  
                      1 a     1     i   1     D   D   1 t D k t   t  
                        t           l                   a     1   2  
                        3           e                                
                                    d                                
                                                                     


N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GND = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.

^ = Dedicated configuration pin.
+ = Reserved configuration pin, which is tri-stated during user mode.
* = Reserved configuration pin, which drives out in user mode.
PDn = Power Down pin. 
@ = Special-purpose pin. 
# = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use.
& = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration.  JTAG pin stability prevents accidental loading of JTAG instructions.


Device-Specific Information:                        d:\digital_030423\kvmf.rpt
kvmf

** RESOURCE USAGE **

                                                Shareable     External
Logic Array Block     Logic Cells   I/O Pins    Expanders   Interconnect

A:     LC1 - LC16     3/16( 18%)   7/10( 70%)   0/16(  0%)   9/36( 25%) 
B:    LC17 - LC32     1/16(  6%)  10/10(100%)   1/16(  6%)  10/36( 27%) 
C:    LC33 - LC48     8/16( 50%)  10/10(100%)   2/16( 12%)  22/36( 61%) 
D:    LC49 - LC64     7/16( 43%)  10/10(100%)   7/16( 43%)  18/36( 50%) 
E:    LC65 - LC80     3/16( 18%)   7/10( 70%)   3/16( 18%)  13/36( 36%) 
F:    LC81 - LC96     7/16( 43%)  10/10(100%)   7/16( 43%)  19/36( 52%) 
G:   LC97 - LC112     1/16(  6%)  10/10(100%)   1/16(  6%)  10/36( 27%) 
H:  LC113 - LC128     6/16( 37%)   1/10( 10%)   0/16(  0%)  10/36( 27%) 


Total dedicated input pins used:                 2/4      ( 50%)
Total I/O pins used:                            65/80     ( 81%)
Total logic cells used:                         36/128    ( 28%)
Total shareable expanders used:                 19/128    ( 14%)
Total Turbo logic cells used:                   36/128    ( 28%)
Total shareable expanders not available (n/a):   2/128    (  1%)
Average fan-in:                                  7.36
Total fan-in:                                   265

Total input pins required:                      36