📄 oaveriloginerrorstest.cpp
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// *****************************************************************************// *****************************************************************************// oaVerilogInErrorsTest.cpp//// This file contains the implementation of the oaVerilogInErrorsTest class.//// *****************************************************************************// Except as specified in the OpenAccess terms of use of Cadence or Silicon// Integration Initiative, this material may not be copied, modified,// re-published, uploaded, executed, or istributed in any way, in any medium,// in whole or in part, without prior written permission from Cadence.//// Copyright 2003-2005 Cadence Design Systems, Inc.// All Rights Reserved.//// $Author: shaun $// $Revision: 1.34 $// $Date: 2005/07/12 03:51:07 $// $State: Exp $// *****************************************************************************// *****************************************************************************#include "oaVerilogInTest.h"// *****************************************************************************// oaVerilogInErrorsTest::oaVerilogInErrorsTest()//// This is the constructor for the oaVerilogInErrorsTest class.// *****************************************************************************oaVerilogInErrorsTest::oaVerilogInErrorsTest(const oaString &name, oaBoolean doNoEMH, oaBoolean doEMH): oaVerilogInTest(name, doNoEMH, doEMH){}// *****************************************************************************// oaVerilogInErrorsTest::buildLeafLib()//// This function builds a library of leaf cells for Verilog files to reference.// It must be called after the database is initialized but before the first// Verilog file is read. The library will be created in the current working// directory.// *****************************************************************************voidoaVerilogInErrorsTest::buildLeafLib(const oaString libPath, const oaString cellNameStr, const oaString viewNameStr, oaBoolean addOrder){ enableCallbacks(false); oaNativeNS ns; oaScalarName leafLibName(ns, libPath); oaScalarName leafCellName(ns, cellNameStr); oaScalarName leafViewName(ns, viewNameStr); oaLib *lib = oaLib::find(leafLibName); if (!lib && oaLib::exists(libPath)) { lib = oaLib::open(leafLibName, libPath); } if (!lib) { lib = oaLib::create(leafLibName, libPath); } if (oaDesign::find(leafLibName, leafCellName, leafViewName)) { return; } oaDesign *design = oaDesign::open(leafLibName, leafCellName, leafViewName, oaViewType::get(oacNetlist), 'w'); oaModule *module = oaModule::create(design, leafCellName); design->setTopModule(module); oaScalarName in(ns, "in"); oaModNet *net = oaModNet::create(module, in); oaModTerm *term = oaModTerm::create(net, in, oacInputTermType); if (addOrder) { term->setPosition(0); //isInterface->set(term, 1); } oaScalarName out(ns, "out"); net = oaModNet::create(module, out); term = oaModTerm::create(net, out, oacOutputTermType); if (addOrder) { term->setPosition(1); //isInterface->set(term, 1); } design->save();}// *****************************************************************************// oaVerilogInErrorsTest::closeNotInLib()//// This method closes all open designs that are not in the given library.// *****************************************************************************voidoaVerilogInErrorsTest::closeNotInLib(const oaString &leafLibNameStr){ oaVerilogNS ns; oaString designLibStr; oaScalarName designLibName; oaScalarName cellName; oaScalarName viewName; oaIter<oaDesign> designIter(oaDesign::getOpenDesigns()); while (oaDesign *design = designIter.getNext()) { design->getLibName(designLibName); design->getCellName(cellName); design->getViewName(viewName); designLibName.get(ns, designLibStr); if (designLibStr != leafLibNameStr) { design->purge(); if (oaDesign::exists(designLibName, cellName, viewName)) { oaDesign::destroy(designLibName, cellName, viewName); } } }}// *****************************************************************************// oaVerilogInErrorsTest::normalizeOutput()//// This function normalizes test output between Windows and Unix.// *****************************************************************************voidoaVerilogInErrorsTest::normalizeOutput(){#ifdef WINDOWS oaString outFileName; getPath(getName() + ".out", outFileName); oaString tmpFileName = getName() + ".tmp"; oaString cmd = "rename " + outFileName + " " + tmpFileName; system((const char*) cmd); FILE *in = fopen((const char*) tmpFileName, "r"); FILE *out = fopen((const char*) outFileName, "w"); oaChar c = fgetc(in); while (c != EOF) { if (c == '\\') { c = '/'; } fputc(c, out); c = fgetc(in); } fclose(in); fclose(out); cmd = "del /q " + tmpFileName; system((const char*) cmd);#endif}// *****************************************************************************// oaVerilogInErrorsTest::preTest()//// This function makes preparations before the test is run. This includes// copying the input files.// *****************************************************************************voidoaVerilogInErrorsTest::preTest(){ if (copyRefFiles) { const oaString files[] = { "badNumber.v", "badOrderLeaf1.v", "badOrderLeaf2.v", "badOrderLeaf3.v", "badToken.v", "inconsistentTerm.v", "multiDimArray.v", "nonGlobal.v", "stubOrder.v", "stubTermWidth.v", "syntax.v", "termNotFoundLeaf1.v", "termNotFoundLeaf2.v", "termNotFoundLeaf3.v", "tieHiDecl.v", "tieLoDecl.v", "widthMismatch.v", "widthMismatch2.v", "widthMismatchOrder.v", "" }; for (oaUInt4 i = 0; files[i].getLength() != 0; i++) { oaString tmp; getRelPath(files[i], tmp); if (!tmp.isEmpty() && tmp != files[i]) { copyFile(tmp, files[i]); } } } buildLeafLib("oaVerilogInTestLeafLib", "scalarLeaf", "abstract"); buildLeafLib("oaVerilogInTestLeafLib", "noOrderLeaf", "abstract", false);}// *****************************************************************************// oaVerilogInErrorsTest::test()//// This method is the main entry point for the test.// *****************************************************************************oaBooleanoaVerilogInErrorsTest::test(){ preTest(); openOutputFile(); enableCallbacks(true); try { oaString testcase; MsgAdapter msgs; VerilogIn reader(msgs); OptionsIn &myOptions = reader.getOptions(); oaString leafLibStr("oaVerilogInTestLeafLib"); msgs.setOutFile(tout.outFile); msgs.setErrFile(tout.outFile); myOptions.addLeafLib(leafLibStr); myOptions.enablePurgeLeafs(false); // The badNumber.v file contains an improperly constructed number. myOptions.enableFileAndLine(true); try { testcase = getPathToData() + ds + "badNumber.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The badOrderLeaf1.v file contains an inconsistent port declaration // for a leaf cell. This test case uses ANSI-style port declarations. myOptions.enableFileAndLine(false); try { testcase = getPathToData() + ds + "badOrderLeaf1.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The badOrderLeaf2.v file contains an inconsistent port declaration // for a leaf cell. try { testcase = getPathToData() + ds + "badOrderLeaf2.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The badToken.v file contains a compiler directive. try { testcase = getPathToData() + ds + "badToken.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The inconsistentTerm.v file contains a single multi-bit terminal in // which one bit is declared as an input and the other bit is declared // as an output. myOptions.enableFileAndLine(false); try { testcase = getPathToData() + ds + "inconsistentTerm.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The multiDimArray.v file contains a multi-dimensional array. try { testcase = getPathToData() + ds + "multiDimArray.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The nonGlobal.v file contains an out-of-module reference to a // non-global net. try { testcase = getPathToData() + ds + "nonGlobal.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The syntax.v file contains a syntax error. myOptions.enableFileAndLine(true); try { testcase = getPathToData() + ds + "syntax.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The termNotFoundLeaf1.v file contains a leaf declaration using ANSI // style ports that does not match the actual leaf. myOptions.enableFileAndLine(false); try { testcase = getPathToData() + ds + "termNotFoundLeaf1.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The termNotFoundLeaf2.v file contains a leaf declaration // that does not match the actual leaf. try { testcase = getPathToData() + ds + "termNotFoundLeaf2.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The tieHiDecl.v file contains declaration for the tie high net // within a module. try { testcase = getPathToData() + ds + "tieHiDecl.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The The tieLoDecl.v file contains declaration for the tie low net // within a module. try { testcase = getPathToData() + ds + "tieLoDecl.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The widthMismatch.v file contains a width mismatch between the terms // of a vector inst and a net. The connection is made by name. myOptions.enableFileAndLine(true); try { testcase = getPathToData() + ds + "widthMismatch.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); // The widthMismatch2.v file contains a width mismatch between the terms // of an inst and a bundle net. The connection is made by name. myOptions.enableFileAndLine(true); try { testcase = getPathToData() + ds + "widthMismatch2.v"; testReader(reader, testcase); } catch(oaException &verr) { msgs.printError((const char*) verr.getMsg()); closeNotInLib(leafLibStr); } tout.print("\n\n\n"); } catch(Error &verr) { tout.print(verr.getMsg()); closeOutputFile(); enableCallbacks(false); throw; } catch(oaException &oaErr) { tout.print((const char*) oaErr.getMsg()); closeOutputFile(); enableCallbacks(false); throw; } catch(...) { tout.print("Caught an exception that was not handled by the reader.\n"); closeOutputFile(); enableCallbacks(false); throw; } closeOutputFile(); enableCallbacks(false); cleanup("oaVerilogInTestLeafLib"); cleanup(getName() + "_designX"); normalizeOutput(); return compareOutputByName(getName());}
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